312     uint32_t wpalcon[2];    /* Window palette control registers */  member
509         ret = (s->wpalcon[1] >> FIMD_WPAL_W0PAL_L_SHT) & FIMD_WPAL_W0PAL_L;  in exynos4210_fimd_palette_format()
515         ret = (s->wpalcon[1] >> FIMD_WPAL_W1PAL_L_SHT) & FIMD_WPAL_W1PAL_L;  in exynos4210_fimd_palette_format()
521         ret = ((s->wpalcon[0] >> FIMD_WPAL_W2PAL_H_SHT) & FIMD_WPAL_W2PAL_H) |  in exynos4210_fimd_palette_format()
522             ((s->wpalcon[1] >> FIMD_WPAL_W2PAL_L_SHT) & FIMD_WPAL_W2PAL_L);  in exynos4210_fimd_palette_format()
525         ret = ((s->wpalcon[0] >> FIMD_WPAL_W3PAL_H_SHT) & FIMD_WPAL_W3PAL_H) |  in exynos4210_fimd_palette_format()
526             ((s->wpalcon[1] >> FIMD_WPAL_W3PAL_L_SHT) & FIMD_WPAL_W3PAL_L);  in exynos4210_fimd_palette_format()
529         ret = ((s->wpalcon[0] >> FIMD_WPAL_W4PAL_H_SHT) & FIMD_WPAL_W4PAL_H) |  in exynos4210_fimd_palette_format()
530             ((s->wpalcon[1] >> FIMD_WPAL_W4PAL_L_SHT) & FIMD_WPAL_W4PAL_L);  in exynos4210_fimd_palette_format()
1563         s->wpalcon[i] = val;  in exynos4210_fimd_write()
1564         if (s->wpalcon[1] & FIMD_WPALCON_UPDATEEN) {  in exynos4210_fimd_write()
1764         return s->wpalcon[(offset - FIMD_WPALCON_HIGH) >> 2];  in exynos4210_fimd_read()
1905         VMSTATE_UINT32_ARRAY(wpalcon, Exynos4210fimdState, 2),