Lines Matching refs:cxl_dstate

33     CXLDeviceState *cxl_dstate = opaque;  in caps_reg_read()  local
37 return cxl_dstate->caps_reg_state32[offset / size]; in caps_reg_read()
39 return cxl_dstate->caps_reg_state64[offset / size]; in caps_reg_read()
47 CXLDeviceState *cxl_dstate = opaque; in dev_reg_read() local
51 return cxl_dstate->dev_reg_state[offset]; in dev_reg_read()
53 return cxl_dstate->dev_reg_state16[offset / size]; in dev_reg_read()
55 return cxl_dstate->dev_reg_state32[offset / size]; in dev_reg_read()
57 return cxl_dstate->dev_reg_state64[offset / size]; in dev_reg_read()
65 CXLDeviceState *cxl_dstate; in mailbox_reg_read() local
69 cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate; in mailbox_reg_read()
72 cxl_dstate = &CXL_SWITCH_MAILBOX_CCI(cci->intf)->cxl_dstate; in mailbox_reg_read()
79 return cxl_dstate->mbox_reg_state[offset]; in mailbox_reg_read()
81 return cxl_dstate->mbox_reg_state16[offset / size]; in mailbox_reg_read()
83 return cxl_dstate->mbox_reg_state32[offset / size]; in mailbox_reg_read()
94 cxl_dstate->mbox_reg_state64[offset / size] = bg_status_reg; in mailbox_reg_read()
97 uint64_t status_reg = cxl_dstate->mbox_reg_state64[offset / size]; in mailbox_reg_read()
101 cxl_dstate->mbox_reg_state64[offset / size] = status_reg; in mailbox_reg_read()
104 return cxl_dstate->mbox_reg_state64[offset / size]; in mailbox_reg_read()
154 CXLDeviceState *cxl_dstate; in mailbox_reg_write() local
158 cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate; in mailbox_reg_write()
161 cxl_dstate = &CXL_SWITCH_MAILBOX_CCI(cci->intf)->cxl_dstate; in mailbox_reg_write()
167 memcpy(cxl_dstate->mbox_reg_state + offset, &value, size); in mailbox_reg_write()
173 mailbox_mem_writel(cxl_dstate->mbox_reg_state32, offset, value); in mailbox_reg_write()
176 mailbox_mem_writeq(cxl_dstate->mbox_reg_state64, offset, value); in mailbox_reg_write()
182 if (ARRAY_FIELD_EX32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CTRL, in mailbox_reg_write()
185 cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_CMD]; in mailbox_reg_write()
190 uint8_t *pl = cxl_dstate->mbox_reg_state + A_CXL_DEV_CMD_PAYLOAD; in mailbox_reg_write()
222 cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_CMD] = command_reg; in mailbox_reg_write()
223 cxl_dstate->mbox_reg_state64[R_CXL_DEV_MAILBOX_STS] = status_reg; in mailbox_reg_write()
225 ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CTRL, in mailbox_reg_write()
232 CXLDeviceState *cxl_dstate = opaque; in mdev_reg_read() local
234 return cxl_dstate->memdev_status; in mdev_reg_read()
303 void cxl_device_register_block_init(Object *obj, CXLDeviceState *cxl_dstate, in cxl_device_register_block_init() argument
307 memory_region_init(&cxl_dstate->device_registers, obj, "device-registers", in cxl_device_register_block_init()
310 memory_region_init_io(&cxl_dstate->caps, obj, &caps_ops, cxl_dstate, in cxl_device_register_block_init()
312 memory_region_init_io(&cxl_dstate->device, obj, &dev_ops, cxl_dstate, in cxl_device_register_block_init()
314 memory_region_init_io(&cxl_dstate->mailbox, obj, &mailbox_ops, cci, in cxl_device_register_block_init()
316 memory_region_init_io(&cxl_dstate->memory_device, obj, &mdev_ops, in cxl_device_register_block_init()
317 cxl_dstate, "memory device caps", in cxl_device_register_block_init()
320 memory_region_add_subregion(&cxl_dstate->device_registers, 0, in cxl_device_register_block_init()
321 &cxl_dstate->caps); in cxl_device_register_block_init()
322 memory_region_add_subregion(&cxl_dstate->device_registers, in cxl_device_register_block_init()
324 &cxl_dstate->device); in cxl_device_register_block_init()
325 memory_region_add_subregion(&cxl_dstate->device_registers, in cxl_device_register_block_init()
327 &cxl_dstate->mailbox); in cxl_device_register_block_init()
328 memory_region_add_subregion(&cxl_dstate->device_registers, in cxl_device_register_block_init()
330 &cxl_dstate->memory_device); in cxl_device_register_block_init()
333 void cxl_event_set_status(CXLDeviceState *cxl_dstate, CXLEventLogType log_type, in cxl_event_set_status() argument
337 cxl_dstate->event_status |= (1 << log_type); in cxl_event_set_status()
339 cxl_dstate->event_status &= ~(1 << log_type); in cxl_event_set_status()
342 ARRAY_FIELD_DP64(cxl_dstate->dev_reg_state64, CXL_DEV_EVENT_STATUS, in cxl_event_set_status()
343 EVENT_STATUS, cxl_dstate->event_status); in cxl_event_set_status()
346 static void device_reg_init_common(CXLDeviceState *cxl_dstate) in device_reg_init_common() argument
351 cxl_event_set_status(cxl_dstate, log, false); in device_reg_init_common()
355 static void mailbox_reg_init_common(CXLDeviceState *cxl_dstate) in mailbox_reg_init_common() argument
360 ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CAP, in mailbox_reg_init_common()
362 cxl_dstate->payload_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE; in mailbox_reg_init_common()
364 ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CAP, in mailbox_reg_init_common()
366 ARRAY_FIELD_DP32(cxl_dstate->mbox_reg_state32, CXL_DEV_MAILBOX_CAP, in mailbox_reg_init_common()
368 cxl_dstate->mbox_msi_n = msi_n; in mailbox_reg_init_common()
371 static void memdev_reg_init_common(CXLDeviceState *cxl_dstate) in memdev_reg_init_common() argument
378 cxl_dstate->memdev_status = memdev_status_reg; in memdev_reg_init_common()
383 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cxl_device_register_init_t3() local
384 uint64_t *cap_h = cxl_dstate->caps_reg_state64; in cxl_device_register_init_t3()
392 cxl_device_cap_init(cxl_dstate, DEVICE_STATUS, 1, 2); in cxl_device_register_init_t3()
393 device_reg_init_common(cxl_dstate); in cxl_device_register_init_t3()
395 cxl_device_cap_init(cxl_dstate, MAILBOX, 2, 1); in cxl_device_register_init_t3()
396 mailbox_reg_init_common(cxl_dstate); in cxl_device_register_init_t3()
398 cxl_device_cap_init(cxl_dstate, MEMORY_DEVICE, 0x4000, 1); in cxl_device_register_init_t3()
399 memdev_reg_init_common(cxl_dstate); in cxl_device_register_init_t3()
407 CXLDeviceState *cxl_dstate = &sw->cxl_dstate; in cxl_device_register_init_swcci() local
408 uint64_t *cap_h = cxl_dstate->caps_reg_state64; in cxl_device_register_init_swcci()
416 cxl_device_cap_init(cxl_dstate, DEVICE_STATUS, 1, 2); in cxl_device_register_init_swcci()
417 device_reg_init_common(cxl_dstate); in cxl_device_register_init_swcci()
419 cxl_device_cap_init(cxl_dstate, MAILBOX, 2, 1); in cxl_device_register_init_swcci()
420 mailbox_reg_init_common(cxl_dstate); in cxl_device_register_init_swcci()
422 cxl_device_cap_init(cxl_dstate, MEMORY_DEVICE, 0x4000, 1); in cxl_device_register_init_swcci()
423 memdev_reg_init_common(cxl_dstate); in cxl_device_register_init_swcci()
426 uint64_t cxl_device_get_timestamp(CXLDeviceState *cxl_dstate) in cxl_device_get_timestamp() argument
431 if (cxl_dstate->timestamp.set) { in cxl_device_get_timestamp()
434 delta = time - cxl_dstate->timestamp.last_set; in cxl_device_get_timestamp()
435 final_time = cxl_dstate->timestamp.host_set + delta; in cxl_device_get_timestamp()