Lines Matching +full:cortex +full:- +full:a9
2 * Cortex-A9MPCore internal peripheral emulation.
16 #include "hw/qdev-properties.h"
18 #include "target/arm/cpu-qom.h"
26 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in a9mp_priv_set_irq()
33 memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000); in a9mp_priv_initfn()
34 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container); in a9mp_priv_initfn()
36 object_initialize_child(obj, "scu", &s->scu, TYPE_A9_SCU); in a9mp_priv_initfn()
38 object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); in a9mp_priv_initfn()
40 object_initialize_child(obj, "gtimer", &s->gtimer, TYPE_A9_GTIMER); in a9mp_priv_initfn()
42 object_initialize_child(obj, "mptimer", &s->mptimer, TYPE_ARM_MPTIMER); in a9mp_priv_initfn()
44 object_initialize_child(obj, "wdt", &s->wdt, TYPE_ARM_MPTIMER); in a9mp_priv_initfn()
59 if (s->num_irq < 32 || s->num_irq > 256) { in a9mp_priv_realize()
60 error_setg(errp, "Property 'num-irq' must be between 32 and 256"); in a9mp_priv_realize()
66 if (strcmp(object_get_typename(cpuobj), ARM_CPU_TYPE_NAME("cortex-a9"))) { in a9mp_priv_realize()
67 /* We might allow Cortex-A5 once we model it */ in a9mp_priv_realize()
69 "Cortex-A9MPCore peripheral can only use Cortex-A9 CPU"); in a9mp_priv_realize()
73 scudev = DEVICE(&s->scu); in a9mp_priv_realize()
74 qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
75 if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { in a9mp_priv_realize()
78 scubusdev = SYS_BUS_DEVICE(&s->scu); in a9mp_priv_realize()
80 gicdev = DEVICE(&s->gic); in a9mp_priv_realize()
81 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
82 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a9mp_priv_realize()
83 qdev_prop_set_uint32(gicdev, "num-priority-bits", in a9mp_priv_realize()
91 qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); in a9mp_priv_realize()
93 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in a9mp_priv_realize()
96 gicbusdev = SYS_BUS_DEVICE(&s->gic); in a9mp_priv_realize()
102 qdev_init_gpio_in(dev, a9mp_priv_set_irq, s->num_irq - 32); in a9mp_priv_realize()
104 gtimerdev = DEVICE(&s->gtimer); in a9mp_priv_realize()
105 qdev_prop_set_uint32(gtimerdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
106 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gtimer), errp)) { in a9mp_priv_realize()
109 gtimerbusdev = SYS_BUS_DEVICE(&s->gtimer); in a9mp_priv_realize()
111 mptimerdev = DEVICE(&s->mptimer); in a9mp_priv_realize()
112 qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
113 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mptimer), errp)) { in a9mp_priv_realize()
116 mptimerbusdev = SYS_BUS_DEVICE(&s->mptimer); in a9mp_priv_realize()
118 wdtdev = DEVICE(&s->wdt); in a9mp_priv_realize()
119 qdev_prop_set_uint32(wdtdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
120 if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt), errp)) { in a9mp_priv_realize()
123 wdtbusdev = SYS_BUS_DEVICE(&s->wdt); in a9mp_priv_realize()
126 * 0x0000-0x00ff -- Snoop Control Unit in a9mp_priv_realize()
127 * 0x0100-0x01ff -- GIC CPU interface in a9mp_priv_realize()
128 * 0x0200-0x02ff -- Global Timer in a9mp_priv_realize()
129 * 0x0300-0x05ff -- nothing in a9mp_priv_realize()
130 * 0x0600-0x06ff -- private timers and watchdogs in a9mp_priv_realize()
131 * 0x0700-0x0fff -- nothing in a9mp_priv_realize()
132 * 0x1000-0x1fff -- GIC Distributor in a9mp_priv_realize()
134 memory_region_add_subregion(&s->container, 0, in a9mp_priv_realize()
137 memory_region_add_subregion(&s->container, 0x100, in a9mp_priv_realize()
139 memory_region_add_subregion(&s->container, 0x200, in a9mp_priv_realize()
141 /* Note that the A9 exposes only the "timer/watchdog for this core" in a9mp_priv_realize()
144 memory_region_add_subregion(&s->container, 0x600, in a9mp_priv_realize()
146 memory_region_add_subregion(&s->container, 0x620, in a9mp_priv_realize()
148 memory_region_add_subregion(&s->container, 0x1000, in a9mp_priv_realize()
155 for (i = 0; i < s->num_cpu; i++) { in a9mp_priv_realize()
156 int ppibase = (s->num_irq - 32) + i * 32; in a9mp_priv_realize()
167 DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1),
169 * The Cortex-A9MP may have anything from 0 to 224 external interrupt
175 DEFINE_PROP_UINT32("num-irq", A9MPPrivState, num_irq, 0),
182 dc->realize = a9mp_priv_realize; in a9mp_priv_class_init()