35     qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level);  in a15mp_priv_set_irq()
46     object_initialize_child(obj, "gic", &s->gic, gic_class_name());  in a15mp_priv_initfn()
47     qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);  in a15mp_priv_initfn()
61     gicdev = DEVICE(&s->gic);  in a15mp_priv_realize()
66         /* Make the GIC's TZ support match the CPUs. We assume that  in a15mp_priv_realize()
79     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) {  in a15mp_priv_realize()
82     busdev = SYS_BUS_DEVICE(&s->gic);  in a15mp_priv_realize()
84     /* Pass through outbound IRQ lines from the GIC */  in a15mp_priv_realize()
87     /* Pass through inbound GPIO lines to the GIC */  in a15mp_priv_realize()
91      * appropriate GIC PPI inputs  in a15mp_priv_realize()
98          * GIC PPI inputs used on the A15:  in a15mp_priv_realize()
112             /* Connect the GIC maintenance interrupt to PPI ID 25 */  in a15mp_priv_realize()
120      *  0x1000-0x1fff -- GIC Distributor  in a15mp_priv_realize()
121      *  0x2000-0x3fff -- GIC CPU interface  in a15mp_priv_realize()
122      *  0x4000-0x4fff -- GIC virtual interface control for this CPU  in a15mp_priv_realize()
123      *  0x5000-0x51ff -- GIC virtual interface control for CPU 0  in a15mp_priv_realize()
124      *  0x5200-0x53ff -- GIC virtual interface control for CPU 1  in a15mp_priv_realize()
125      *  0x5400-0x55ff -- GIC virtual interface control for CPU 2  in a15mp_priv_realize()
126      *  0x5600-0x57ff -- GIC virtual interface control for CPU 3  in a15mp_priv_realize()
127      *  0x6000-0x7fff -- GIC virtual CPU interface  in a15mp_priv_realize()