6  * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "hw/qdev-properties.h"
13 #include "hw/qdev-properties-system.h"
15 #include "qemu/module.h"
23     if (!(s->ctrl & UART_BCLKEN)) {  in max78000_uart_can_receive()
26     return fifo8_num_free(&s->rx_fifo);  in max78000_uart_can_receive()
33     interrupt_level = s->int_fl & s->int_en;  in max78000_update_irq()
34     qemu_set_irq(s->irq, interrupt_level);  in max78000_update_irq()
41     assert(size <= fifo8_num_free(&s->rx_fifo));  in max78000_uart_receive()
43     fifo8_push_all(&s->rx_fifo, buf, size);  in max78000_uart_receive()
45     uint32_t rx_threshold = s->ctrl & 0xf;  in max78000_uart_receive()
47     if (fifo8_num_used(&s->rx_fifo) >= rx_threshold) {  in max78000_uart_receive()
48         s->int_fl |= UART_RX_THD;  in max78000_uart_receive()
58     s->ctrl = 0;  in max78000_uart_reset_hold()
59     s->status = UART_TX_EM | UART_RX_EM;  in max78000_uart_reset_hold()
60     s->int_en = 0;  in max78000_uart_reset_hold()
61     s->int_fl = 0;  in max78000_uart_reset_hold()
62     s->osr = 0;  in max78000_uart_reset_hold()
63     s->txpeek = 0;  in max78000_uart_reset_hold()
64     s->pnr = UART_RTS;  in max78000_uart_reset_hold()
65     s->fifo = 0;  in max78000_uart_reset_hold()
66     s->dma = 0;  in max78000_uart_reset_hold()
67     s->wken = 0;  in max78000_uart_reset_hold()
68     s->wkfl = 0;  in max78000_uart_reset_hold()
69     fifo8_reset(&s->rx_fifo);  in max78000_uart_reset_hold()
79         retvalue = s->ctrl;  in max78000_uart_read()
82         retvalue = (fifo8_num_used(&s->rx_fifo) << UART_RX_LVL) |  in max78000_uart_read()
84                     (fifo8_is_empty(&s->rx_fifo) ? UART_RX_EM : 0);  in max78000_uart_read()
87         retvalue = s->int_en;  in max78000_uart_read()
90         retvalue = s->int_fl;  in max78000_uart_read()
93         retvalue = s->clkdiv;  in max78000_uart_read()
96         retvalue = s->osr;  in max78000_uart_read()
99         if (!fifo8_is_empty(&s->rx_fifo)) {  in max78000_uart_read()
100             retvalue = fifo8_peek(&s->rx_fifo);  in max78000_uart_read()
104         retvalue = s->pnr;  in max78000_uart_read()
107         if (!fifo8_is_empty(&s->rx_fifo)) {  in max78000_uart_read()
108             retvalue = fifo8_pop(&s->rx_fifo);  in max78000_uart_read()
114         retvalue = s->dma;  in max78000_uart_read()
117         retvalue = s->wken;  in max78000_uart_read()
120         retvalue = s->wkfl;  in max78000_uart_read()
142             fifo8_reset(&s->rx_fifo);  in max78000_uart_write()
147         s->ctrl = value & ~(UART_FLUSH_RX | UART_FLUSH_TX);  in max78000_uart_write()
160         s->int_en = value;  in max78000_uart_write()
163         s->int_fl = s->int_fl & ~(value);  in max78000_uart_write()
167         s->clkdiv = value;  in max78000_uart_write()
170         s->osr = value;  in max78000_uart_write()
173         s->pnr = value;  in max78000_uart_write()
181         qemu_chr_fe_write_all(&s->chr, &data, 1);  in max78000_uart_write()
184         s->int_fl |= UART_TX_HE;  in max78000_uart_write()
190         s->dma = value;  in max78000_uart_write()
193         s->wken = value;  in max78000_uart_write()
196         s->wkfl = value;  in max78000_uart_write()
221         VMSTATE_UINT32(ctrl, Max78000UartState),
241     fifo8_create(&s->rx_fifo, 8);  in max78000_uart_init()
243     sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);  in max78000_uart_init()
245     memory_region_init_io(&s->mmio, obj, &max78000_uart_ops, s,  in max78000_uart_init()
247     sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);  in max78000_uart_init()
253     fifo8_destroy(&s->rx_fifo);  in max78000_uart_finalize()
260     qemu_chr_fe_set_handlers(&s->chr, max78000_uart_can_receive,  in max78000_uart_realize()
270     rc->phases.hold = max78000_uart_reset_hold;  in max78000_uart_class_init()
273     dc->realize = max78000_uart_realize;  in max78000_uart_class_init()
275     dc->vmsd = &max78000_uart_vmstate;  in max78000_uart_class_init()