51         VMSTATE_UINT32(usr2, IMXSerialState),
67     uint32_t usr2;  in imx_update()  local
81      * Bits that we want in USR2 are not as conveniently laid out,  in imx_update()
92     usr2 = s->usr2 & mask;  in imx_update()
94     qemu_set_irq(s->irq, usr1 || usr2);  in imx_update()
102         s->usr2 |= USR2_ORE;  in imx_serial_rx_fifo_push()
155     s->usr2 = USR2_TXFE | USR2_TXDC | USR2_DCDIN;  in imx_serial_reset()
204                 s->usr2 &= ~USR2_RDR;  in imx_serial_read()
222     case 0x26: /* USR2 */  in imx_serial_read()
223         return s->usr2;  in imx_serial_read()
274             s->usr2 &= ~USR2_TXDC;  in imx_serial_write()
277             s->usr2 |= USR2_TXDC;  in imx_serial_write()
315     case 0x26: /* USR2 */  in imx_serial_write()
323         s->usr2 &= ~value;  in imx_serial_write()
386     s->usr2 |= USR2_RDR;  in imx_put_data()
389         s->usr2 |= USR2_BRCD;  in imx_put_data()
398     s->usr2 |= USR2_WAKE;  in imx_receive()