Lines Matching refs:dor
942 s->dor_vmstate = s->dor | GET_CUR_DRV(s); in fdc_pre_save()
959 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK; in fdc_post_load()
1104 fdctrl->dor = FD_DOR_nRESET; in fdctrl_reset()
1105 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0; in fdctrl_reset()
1208 uint32_t retval = fdctrl->dor; in fdctrl_read_dor()
1239 if (fdctrl->dor & FD_DOR_nRESET) { in fdctrl_write_dor()
1243 if (!(fdctrl->dor & FD_DOR_nRESET)) { in fdctrl_write_dor()
1252 fdctrl->dor = value; in fdctrl_write_dor()
1268 if (!(fdctrl->dor & FD_DOR_nRESET)) { in fdctrl_write_tape()
1284 fdctrl->dor |= FD_DOR_nRESET; in fdctrl_read_main_status()
1295 if (!(fdctrl->dor & FD_DOR_nRESET)) { in fdctrl_write_rate()
1302 fdctrl->dor &= ~FD_DOR_nRESET; in fdctrl_write_rate()
1304 fdctrl->dor |= FD_DOR_nRESET; in fdctrl_write_rate()
1316 if (!(fdctrl->dor & FD_DOR_nRESET)) { in fdctrl_write_ccr()
1546 if (fdctrl->dor & FD_DOR_DMAEN) { in fdctrl_start_transfer()
1863 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0); in fdctrl_handle_dumpreg()
1980 fdctrl->dor &= ~FD_DOR_DMAEN; in fdctrl_handle_specify()
1982 fdctrl->dor |= FD_DOR_DMAEN; in fdctrl_handle_specify()
2214 if (!(fdctrl->dor & FD_DOR_nRESET)) { in fdctrl_write_data()