2  * Xilinx ZynqMP ZCU102 board
20 #include "hw/arm/xlnx-zynqmp.h"
23 #include "qemu/error-report.h"
43 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
51     return s->secure;  in OBJECT_DECLARE_SIMPLE_TYPE()
58     s->secure = value;  in zcu102_set_secure()
65     return s->virt;  in zcu102_get_virt()
72     s->virt = value;  in zcu102_set_virt()
84     /* If EL3 is enabled, we keep all firmware nodes active.  */  in zcu102_modify_dtb()
85     if (!s->secure) {  in zcu102_modify_dtb()
86         node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware",  in zcu102_modify_dtb()
93             /* Allow HVC based firmware if EL2 is enabled.  */  in zcu102_modify_dtb()
94             if (method_is_hvc && s->virt) {  in zcu102_modify_dtb()
131     uint64_t ram_size = machine->ram_size;  in xlnx_zcu102_init()
146     object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP);  in xlnx_zcu102_init()
148     if (machine->audiodev) {  in xlnx_zcu102_init()
149         qdev_prop_set_string(DEVICE(&s->soc.dp), "audiodev", machine->audiodev);  in xlnx_zcu102_init()
152     object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram),  in xlnx_zcu102_init()
154     object_property_set_bool(OBJECT(&s->soc), "secure", s->secure,  in xlnx_zcu102_init()
156     object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt,  in xlnx_zcu102_init()
162         object_property_set_link(OBJECT(&s->soc), bus_name,  in xlnx_zcu102_init()
163                                  OBJECT(s->canbus[i]), &error_fatal);  in xlnx_zcu102_init()
167     qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);  in xlnx_zcu102_init()
170     bbram_attach_drive(&s->soc.bbram);  in xlnx_zcu102_init()
173     efuse_attach_drive(&s->soc.efuse);  in xlnx_zcu102_init()
183         bus_name = g_strdup_printf("sd-bus%d", i);  in xlnx_zcu102_init()
184         bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);  in xlnx_zcu102_init()
202         spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);  in xlnx_zcu102_init()
215         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);  in xlnx_zcu102_init()
226         spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);  in xlnx_zcu102_init()
239         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);  in xlnx_zcu102_init()
244     s->binfo.ram_size = ram_size;  in xlnx_zcu102_init()
245     s->binfo.loader_start = 0;  in xlnx_zcu102_init()
246     s->binfo.modify_dtb = zcu102_modify_dtb;  in xlnx_zcu102_init()
247     s->binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;  in xlnx_zcu102_init()
248     arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo);  in xlnx_zcu102_init()
256     s->secure = false;  in xlnx_zcu102_machine_instance_init()
258     s->virt = false;  in xlnx_zcu102_machine_instance_init()
260                              (Object **)&s->canbus[0],  in xlnx_zcu102_machine_instance_init()
265                              (Object **)&s->canbus[1],  in xlnx_zcu102_machine_instance_init()
274     mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \  in xlnx_zcu102_machine_class_init()
276     mc->init = xlnx_zcu102_init;  in xlnx_zcu102_machine_class_init()
277     mc->block_default_type = IF_IDE;  in xlnx_zcu102_machine_class_init()
278     mc->units_per_default_bus = 1;  in xlnx_zcu102_machine_class_init()
279     mc->ignore_memory_transaction_failures = true;  in xlnx_zcu102_machine_class_init()
280     mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;  in xlnx_zcu102_machine_class_init()
281     mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;  in xlnx_zcu102_machine_class_init()
282     mc->default_ram_id = "ddr-ram";  in xlnx_zcu102_machine_class_init()