Lines Matching +full:zynq +full:- +full:qspi +full:- +full:1
2 * Xilinx Zynq Baseboard System emulation.
28 #include "hw/adc/zynq-xadc.h"
31 #include "qemu/error-report.h"
36 #include "hw/qdev-clock.h"
41 #include "target/arm/cpu-qom.h"
44 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
112 rom_add_blob_fixed("board-setup", board_setup_blob, in zynq_write_board_setup()
125 object_property_set_int(OBJECT(dev), "phy-addr", 7, &error_abort); in gem_init()
141 int num_busses = is_qspi ? NUM_QSPI_BUSSES : 1; in zynq_init_spi_flashes()
144 dev = qdev_new(is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); in zynq_init_spi_flashes()
145 qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); in zynq_init_spi_flashes()
146 qdev_prop_set_uint8(dev, "num-ss-bits", num_ss); in zynq_init_spi_flashes()
147 qdev_prop_set_uint8(dev, "num-busses", num_busses); in zynq_init_spi_flashes()
152 sysbus_mmio_map(busdev, 1, 0xFC000000); in zynq_init_spi_flashes()
175 sysbus_connect_irq(busdev, i * num_ss + j + 1, cs_line); in zynq_init_spi_flashes()
188 if (!strncasecmp(str, "qspi", 4)) { in zynq_set_boot_mode()
189 mode = 1; in zynq_set_boot_mode()
200 m->boot_mode = mode; in zynq_set_boot_mode()
207 MemoryRegion *ocm_ram = g_new(MemoryRegion, 1); in zynq_init()
212 unsigned int smp_cpus = machine->smp.cpus; in zynq_init()
215 if (machine->ram_size > 2 * GiB) { in zynq_init()
221 Object *cpuobj = object_new(machine->cpu_type); in zynq_init()
225 object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE, in zynq_init()
230 zynq_machine->cpu[n] = ARM_CPU(cpuobj); in zynq_init()
234 memory_region_add_subregion(address_space_mem, 0, machine->ram); in zynq_init()
236 /* 256K of on-chip memory */ in zynq_init()
237 memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 * KiB, in zynq_init()
244 pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, in zynq_init()
246 FLASH_SECTOR_SIZE, 1, in zynq_init()
247 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, in zynq_init()
251 zynq_machine->ps_clk = CLOCK(object_new(TYPE_CLOCK)); in zynq_init()
253 OBJECT(zynq_machine->ps_clk)); in zynq_init()
254 object_unref(OBJECT(zynq_machine->ps_clk)); in zynq_init()
255 clock_set_hz(zynq_machine->ps_clk, PS_CLK_FREQUENCY); in zynq_init()
258 slcr = qdev_new("xilinx-zynq_slcr"); in zynq_init()
259 qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk); in zynq_init()
260 qdev_prop_set_uint8(slcr, "boot-mode", zynq_machine->boot_mode); in zynq_init()
265 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); in zynq_init()
273 DeviceState *cpudev = DEVICE(zynq_machine->cpu[n]); in zynq_init()
284 n = zynq_init_spi_flashes(0xE0006000, pic[58 - IRQ_OFFSET], false, 0); in zynq_init()
285 n = zynq_init_spi_flashes(0xE0007000, pic[81 - IRQ_OFFSET], false, n); in zynq_init()
286 n = zynq_init_spi_flashes(0xE000D000, pic[51 - IRQ_OFFSET], true, n); in zynq_init()
288 sysbus_create_simple(TYPE_CHIPIDEA, 0xE0002000, pic[53 - IRQ_OFFSET]); in zynq_init()
289 sysbus_create_simple(TYPE_CHIPIDEA, 0xE0003000, pic[76 - IRQ_OFFSET]); in zynq_init()
298 sysbus_connect_irq(busdev, 0, pic[59 - IRQ_OFFSET]); in zynq_init()
301 qdev_prop_set_chr(dev, "chardev", serial_hd(1)); in zynq_init()
306 sysbus_connect_irq(busdev, 0, pic[82 - IRQ_OFFSET]); in zynq_init()
309 pic[42-IRQ_OFFSET], pic[43-IRQ_OFFSET], pic[44-IRQ_OFFSET], NULL); in zynq_init()
311 pic[69-IRQ_OFFSET], pic[70-IRQ_OFFSET], pic[71-IRQ_OFFSET], NULL); in zynq_init()
313 gem_init(0xE000B000, pic[54 - IRQ_OFFSET]); in zynq_init()
314 gem_init(0xE000C000, pic[77 - IRQ_OFFSET]); in zynq_init()
324 * - SD Host Controller Specification Version 2.0 Part A2 in zynq_init()
325 * - SDIO Specification Version 2.0 in zynq_init()
326 * - MMC Specification Version 3.31 in zynq_init()
329 qdev_prop_set_uint8(dev, "sd-spec-version", 2); in zynq_init()
333 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSET]); in zynq_init()
339 qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), in zynq_init()
346 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]); in zynq_init()
366 sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ in zynq_init()
368 sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]); in zynq_init()
371 dev = qdev_new("xlnx.ps7-dev-cfg"); in zynq_init()
374 sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]); in zynq_init()
378 * Refer to the ug585-Zynq-7000-TRM manual B.3 (Module Summary) and in zynq_init()
379 * the zynq-7000.dtsi. Add placeholders for unimplemented devices. in zynq_init()
381 create_unimplemented_device("zynq.i2c0", 0xE0004000, 4 * KiB); in zynq_init()
382 create_unimplemented_device("zynq.i2c1", 0xE0005000, 4 * KiB); in zynq_init()
383 create_unimplemented_device("zynq.can0", 0xE0008000, 4 * KiB); in zynq_init()
384 create_unimplemented_device("zynq.can1", 0xE0009000, 4 * KiB); in zynq_init()
385 create_unimplemented_device("zynq.gpio", 0xE000A000, 4 * KiB); in zynq_init()
386 create_unimplemented_device("zynq.smcc", 0xE000E000, 4 * KiB); in zynq_init()
388 /* Direct Memory Access Controller, PL330, Non-Secure Mode */ in zynq_init()
389 create_unimplemented_device("zynq.dma_ns", 0xF8004000, 4 * KiB); in zynq_init()
392 create_unimplemented_device("zynq.swdt", 0xF8005000, 4 * KiB); in zynq_init()
395 create_unimplemented_device("zynq.ddrc", 0xF8006000, 4 * KiB); in zynq_init()
398 create_unimplemented_device("zynq.axi_hp0", 0xF8008000, 0x28); in zynq_init()
399 create_unimplemented_device("zynq.axi_hp1", 0xF8009000, 0x28); in zynq_init()
400 create_unimplemented_device("zynq.axi_hp2", 0xF800A000, 0x28); in zynq_init()
401 create_unimplemented_device("zynq.axi_hp3", 0xF800B000, 0x28); in zynq_init()
403 create_unimplemented_device("zynq.efuse", 0xF800d000, 0x20); in zynq_init()
406 create_unimplemented_device("zynq.etb", 0xF8801000, 4 * KiB); in zynq_init()
409 create_unimplemented_device("zynq.cti_etb_tpiu", 0xF8802000, 4 * KiB); in zynq_init()
412 create_unimplemented_device("zynq.tpiu", 0xF8803000, 4 * KiB); in zynq_init()
415 create_unimplemented_device("zynq.funnel", 0xF8804000, 4 * KiB); in zynq_init()
418 create_unimplemented_device("zynq.itm", 0xF8805000, 4 * KiB); in zynq_init()
421 create_unimplemented_device("zynq.cti_ftm", 0xF8809000, 4 * KiB); in zynq_init()
424 create_unimplemented_device("zynq.ftm", 0xF880B000, 4 * KiB); in zynq_init()
427 create_unimplemented_device("cortex-a9.pmu0", 0xF8891000, 4 * KiB); in zynq_init()
428 create_unimplemented_device("cortex-a9.pmu1", 0xF8893000, 4 * KiB); in zynq_init()
431 create_unimplemented_device("zynq.cpu_cti0", 0xF8898000, 4 * KiB); in zynq_init()
432 create_unimplemented_device("zynq.cpu_cti1", 0xF8899000, 4 * KiB); in zynq_init()
434 /* CoreSight PTM-A9, CPU */ in zynq_init()
435 create_unimplemented_device("cortex-a9.ptm0", 0xF889c000, 4 * KiB); in zynq_init()
436 create_unimplemented_device("cortex-a9.ptm1", 0xF889d000, 4 * KiB); in zynq_init()
439 create_unimplemented_device("zynq.trustZone", 0xF8900000, 0x20); in zynq_init()
441 /* AMBA Network Interconnect Advanced Quality of Service (QoS-301) */ in zynq_init()
442 create_unimplemented_device("zynq.qos301_cpu", 0xF8946000, 0x130); in zynq_init()
443 create_unimplemented_device("zynq.qos301_dmac", 0xF8947000, 0x130); in zynq_init()
444 create_unimplemented_device("zynq.qos301_iou", 0xF8948000, 0x130); in zynq_init()
446 zynq_binfo.ram_size = machine->ram_size; in zynq_init()
452 arm_load_kernel(zynq_machine->cpu[0], machine, &zynq_binfo); in zynq_init()
458 ARM_CPU_TYPE_NAME("cortex-a9"), in zynq_machine_class_init()
463 mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9"; in zynq_machine_class_init()
464 mc->init = zynq_init; in zynq_machine_class_init()
465 mc->max_cpus = ZYNQ_MAX_CPUS; in zynq_machine_class_init()
466 mc->no_sdcard = 1; in zynq_machine_class_init()
467 mc->ignore_memory_transaction_failures = true; in zynq_machine_class_init()
468 mc->valid_cpu_types = valid_cpu_types; in zynq_machine_class_init()
469 mc->default_ram_id = "zynq.ext_ram"; in zynq_machine_class_init()
470 prop = object_class_property_add_str(oc, "boot-mode", NULL, in zynq_machine_class_init()
472 object_class_property_set_description(oc, "boot-mode", in zynq_machine_class_init()
474 " jtag qspi sd nor"); in zynq_machine_class_init()
475 object_property_set_default_str(prop, "qspi"); in zynq_machine_class_init()