27 #include "exec/address-spaces.h"
30 #include "hw/qdev-clock.h"
61     object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M);  in stm32f405_soc_initfn()
63     object_initialize_child(obj, "rcc", &s->rcc, TYPE_STM32_RCC);  in stm32f405_soc_initfn()
65     object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32F4XX_SYSCFG);  in stm32f405_soc_initfn()
68         object_initialize_child(obj, "usart[*]", &s->usart[i],  in stm32f405_soc_initfn()
73         object_initialize_child(obj, "timer[*]", &s->timer[i],  in stm32f405_soc_initfn()
78         object_initialize_child(obj, "adc[*]", &s->adc[i], TYPE_STM32F2XX_ADC);  in stm32f405_soc_initfn()
82         object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI);  in stm32f405_soc_initfn()
85     object_initialize_child(obj, "exti", &s->exti, TYPE_STM32F4XX_EXTI);  in stm32f405_soc_initfn()
87     s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);  in stm32f405_soc_initfn()
88     s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0);  in stm32f405_soc_initfn()
101      * We use s->refclk internally and only define it with qdev_init_clock_in()  in stm32f405_soc_realize()
105     if (clock_has_source(s->refclk)) {  in stm32f405_soc_realize()
106         error_setg(errp, "refclk clock must not be wired up by the board code");  in stm32f405_soc_realize()
110     if (!clock_has_source(s->sysclk)) {  in stm32f405_soc_realize()
117      * change the sysclk frequency and define different sysclk sources.  in stm32f405_soc_realize()
120     /* The refclk always runs at frequency HCLK / 8 */  in stm32f405_soc_realize()
121     clock_set_mul_div(s->refclk, 8, 1);  in stm32f405_soc_realize()
122     clock_set_source(s->refclk, s->sysclk);  in stm32f405_soc_realize()
124     memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F405.flash",  in stm32f405_soc_realize()
130     memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc),  in stm32f405_soc_realize()
131                              "STM32F405.flash.alias", &s->flash, 0,  in stm32f405_soc_realize()
134     memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash);  in stm32f405_soc_realize()
135     memory_region_add_subregion(system_memory, 0, &s->flash_alias);  in stm32f405_soc_realize()
137     memory_region_init_ram(&s->sram, NULL, "STM32F405.sram", SRAM_SIZE,  in stm32f405_soc_realize()
143     memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);  in stm32f405_soc_realize()
145     memory_region_init_ram(&s->ccm, NULL, "STM32F405.ccm", CCM_SIZE,  in stm32f405_soc_realize()
151     memory_region_add_subregion(system_memory, CCM_BASE_ADDRESS, &s->ccm);  in stm32f405_soc_realize()
153     armv7m = DEVICE(&s->armv7m);  in stm32f405_soc_realize()
154     qdev_prop_set_uint32(armv7m, "num-irq", 96);  in stm32f405_soc_realize()
155     qdev_prop_set_uint8(armv7m, "num-prio-bits", 4);  in stm32f405_soc_realize()
156     qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4"));  in stm32f405_soc_realize()
157     qdev_prop_set_bit(armv7m, "enable-bitband", true);  in stm32f405_soc_realize()
158     qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);  in stm32f405_soc_realize()
159     qdev_connect_clock_in(armv7m, "refclk", s->refclk);  in stm32f405_soc_realize()
160     object_property_set_link(OBJECT(&s->armv7m), "memory",  in stm32f405_soc_realize()
162     if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) {  in stm32f405_soc_realize()
167     dev = DEVICE(&s->rcc);  in stm32f405_soc_realize()
168     if (!sysbus_realize(SYS_BUS_DEVICE(&s->rcc), errp)) {  in stm32f405_soc_realize()
175     dev = DEVICE(&s->syscfg);  in stm32f405_soc_realize()
176     if (!sysbus_realize(SYS_BUS_DEVICE(&s->syscfg), errp)) {  in stm32f405_soc_realize()
185         dev = DEVICE(&(s->usart[i]));  in stm32f405_soc_realize()
187         if (!sysbus_realize(SYS_BUS_DEVICE(&s->usart[i]), errp)) {  in stm32f405_soc_realize()
197         dev = DEVICE(&(s->timer[i]));  in stm32f405_soc_realize()
198         qdev_prop_set_uint64(dev, "clock-frequency", 1000000000);  in stm32f405_soc_realize()
199         if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), errp)) {  in stm32f405_soc_realize()
208     if (!object_initialize_child_with_props(OBJECT(s), "adc-orirq",  in stm32f405_soc_realize()
209                                             &s->adc_irqs, sizeof(s->adc_irqs),  in stm32f405_soc_realize()
213     object_property_set_int(OBJECT(&s->adc_irqs), "num-lines", STM_NUM_ADCS,  in stm32f405_soc_realize()
215     if (!qdev_realize(DEVICE(&s->adc_irqs), NULL, errp)) {  in stm32f405_soc_realize()
218     qdev_connect_gpio_out(DEVICE(&s->adc_irqs), 0,  in stm32f405_soc_realize()
222         dev = DEVICE(&(s->adc[i]));  in stm32f405_soc_realize()
223         if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc[i]), errp)) {  in stm32f405_soc_realize()
229                            qdev_get_gpio_in(DEVICE(&s->adc_irqs), i));  in stm32f405_soc_realize()
234         dev = DEVICE(&(s->spi[i]));  in stm32f405_soc_realize()
235         if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {  in stm32f405_soc_realize()
244     dev = DEVICE(&s->exti);  in stm32f405_soc_realize()
245     if (!sysbus_realize(SYS_BUS_DEVICE(&s->exti), errp)) {  in stm32f405_soc_realize()
254         qdev_connect_gpio_out(DEVICE(&s->syscfg), i, qdev_get_gpio_in(dev, i));  in stm32f405_soc_realize()
305     dc->realize = stm32f405_soc_realize;  in stm32f405_soc_class_init()