Lines Matching +full:0 +full:x10002000
35 #define SMP_BOOT_ADDR 0xe0000000
36 #define SMP_BOOTREG_ADDR 0x10000030
54 0x33b,
55 0x33b,
56 0x769,
57 0x76d
68 qdev_connect_gpio_out(splitter, 0, out1); in split_irq_from_named()
70 qdev_connect_gpio_out_named(src, outname, 0, in split_irq_from_named()
71 qdev_get_gpio_in(splitter, 0)); in split_irq_from_named()
93 int is_mpcore = 0; in realview_init()
94 int is_pb = 0; in realview_init()
95 uint32_t proc_id = 0; in realview_init()
99 hwaddr periphbase = 0; in realview_init()
106 periphbase = 0x10100000; in realview_init()
114 periphbase = 0x1f000000; in realview_init()
118 for (n = 0; n < smp_cpus; n++) { in realview_init()
142 proc_id = 0x0c000000; in realview_init()
144 proc_id = 0x0e000000; in realview_init()
147 proc_id = 0x06000000; in realview_init()
149 proc_id = 0x04000000; in realview_init()
151 proc_id = 0x02000000; in realview_init()
154 if (is_pb && ram_size > 0x20000000) { in realview_init()
157 low_ram_size = ram_size - 0x20000000; in realview_init()
158 ram_size = 0x20000000; in realview_init()
161 memory_region_add_subregion(sysmem, 0x20000000, ram_lo); in realview_init()
167 if (low_ram_size > 0x10000000) in realview_init()
168 low_ram_size = 0x10000000; in realview_init()
171 ram_hi, 0, low_ram_size); in realview_init()
172 memory_region_add_subregion(sysmem, 0, ram_alias); in realview_init()
175 memory_region_add_subregion(sysmem, 0x70000000, ram_hi); in realview_init()
180 sys_id = is_pb ? 0x01780500 : 0xc1400400; in realview_init()
185 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); in realview_init()
192 sysbus_mmio_map(busdev, 0, periphbase); in realview_init()
193 for (n = 0; n < smp_cpus; n++) { in realview_init()
196 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL); in realview_init()
197 /* Both A9 and 11MPCore put the GIC CPU i/f at base + 0x100 */ in realview_init()
198 realview_binfo.gic_cpu_if_addr = periphbase + 0x100; in realview_init()
200 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000; in realview_init()
202 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]); in realview_init()
204 for (n = 0; n < 64; n++) { in realview_init()
214 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); in realview_init()
215 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]); in realview_init()
217 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]); in realview_init()
218 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]); in realview_init()
220 pl011_create(0x10009000, pic[12], serial_hd(0)); in realview_init()
221 pl011_create(0x1000a000, pic[13], serial_hd(1)); in realview_init()
222 pl011_create(0x1000b000, pic[14], serial_hd(2)); in realview_init()
223 pl011_create(0x1000c000, pic[15], serial_hd(3)); in realview_init()
231 sysbus_mmio_map(busdev, 0, 0x10030000); in realview_init()
232 sysbus_connect_irq(busdev, 0, pic[24]); in realview_init()
234 sysbus_create_simple("sp804", 0x10011000, pic[4]); in realview_init()
235 sysbus_create_simple("sp804", 0x10012000, pic[5]); in realview_init()
237 sysbus_create_simple("pl061", 0x10013000, pic[6]); in realview_init()
238 sysbus_create_simple("pl061", 0x10014000, pic[7]); in realview_init()
239 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]); in realview_init()
245 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10020000); in realview_init()
246 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[23]); in realview_init()
248 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL); in realview_init()
261 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0))); in realview_init()
263 dinfo = drive_get(IF_SD, 0, 0); in realview_init()
274 sysbus_create_simple("pl031", 0x10017000, pic[10]); in realview_init()
280 sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */ in realview_init()
281 sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */ in realview_init()
282 sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */ in realview_init()
283 sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */ in realview_init()
284 sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */ in realview_init()
285 sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */ in realview_init()
286 sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */ in realview_init()
287 sysbus_connect_irq(busdev, 0, pic[48]); in realview_init()
296 while (n >= 0) { in realview_init()
305 lan9118_init(0x4e000000, pic[28]); in realview_init()
307 smc91c111_init(0x4e000000, pic[28]); in realview_init()
315 dev = sysbus_create_simple(TYPE_ARM_SBCON_I2C, 0x10002000, NULL); in realview_init()
317 i2c_slave_create_simple(i2c, "ds1338", 0x68); in realview_init()
320 /* 0x10000000 System registers. */ in realview_init()
321 /* 0x10001000 System controller. */ in realview_init()
322 /* 0x10002000 Two-Wire Serial Bus. */ in realview_init()
323 /* 0x10003000 Reserved. */ in realview_init()
324 /* 0x10004000 AACI. */ in realview_init()
325 /* 0x10005000 MCI. */ in realview_init()
326 /* 0x10006000 KMI0. */ in realview_init()
327 /* 0x10007000 KMI1. */ in realview_init()
328 /* 0x10008000 Character LCD. (EB) */ in realview_init()
329 /* 0x10009000 UART0. */ in realview_init()
330 /* 0x1000a000 UART1. */ in realview_init()
331 /* 0x1000b000 UART2. */ in realview_init()
332 /* 0x1000c000 UART3. */ in realview_init()
333 /* 0x1000d000 SSPI. */ in realview_init()
334 /* 0x1000e000 SCI. */ in realview_init()
335 /* 0x1000f000 Reserved. */ in realview_init()
336 /* 0x10010000 Watchdog. */ in realview_init()
337 /* 0x10011000 Timer 0+1. */ in realview_init()
338 /* 0x10012000 Timer 2+3. */ in realview_init()
339 /* 0x10013000 GPIO 0. */ in realview_init()
340 /* 0x10014000 GPIO 1. */ in realview_init()
341 /* 0x10015000 GPIO 2. */ in realview_init()
342 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */ in realview_init()
343 /* 0x10017000 RTC. */ in realview_init()
344 /* 0x10018000 DMC. */ in realview_init()
345 /* 0x10019000 PCI controller config. */ in realview_init()
346 /* 0x10020000 CLCD. */ in realview_init()
347 /* 0x10030000 DMA Controller. */ in realview_init()
348 /* 0x10040000 GIC1. (EB) */ in realview_init()
349 /* 0x10050000 GIC2. (EB) */ in realview_init()
350 /* 0x10060000 GIC3. (EB) */ in realview_init()
351 /* 0x10070000 GIC4. (EB) */ in realview_init()
352 /* 0x10080000 SMC. */ in realview_init()
353 /* 0x1e000000 GIC1. (PB) */ in realview_init()
354 /* 0x1e001000 GIC2. (PB) */ in realview_init()
355 /* 0x1e002000 GIC3. (PB) */ in realview_init()
356 /* 0x1e003000 GIC4. (PB) */ in realview_init()
357 /* 0x40000000 NOR flash. */ in realview_init()
358 /* 0x44000000 DoC flash. */ in realview_init()
359 /* 0x48000000 SRAM. */ in realview_init()
360 /* 0x4c000000 Configuration flash. */ in realview_init()
361 /* 0x4e000000 Ethernet. */ in realview_init()
362 /* 0x4f000000 USB. */ in realview_init()
363 /* 0x50000000 PISMO. */ in realview_init()
364 /* 0x54000000 PISMO. */ in realview_init()
365 /* 0x58000000 PISMO. */ in realview_init()
366 /* 0x5c000000 PISMO. */ in realview_init()
367 /* 0x60000000 PCI. */ in realview_init()
368 /* 0x60000000 PCI Self Config. */ in realview_init()
369 /* 0x61000000 PCI Config. */ in realview_init()
370 /* 0x62000000 PCI IO. */ in realview_init()
371 /* 0x63000000 PCI mem 0. */ in realview_init()
372 /* 0x64000000 PCI mem 1. */ in realview_init()
373 /* 0x68000000 PCI mem 2. */ in realview_init()
379 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000, in realview_init()
385 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0); in realview_init()