Lines Matching refs:write
730 chip->write(chip->opaque, 0, 0x2a); /* LCD Width register */ in n800_dss_init()
731 chip->write(chip->opaque, 1, 0x64); in n800_dss_init()
732 chip->write(chip->opaque, 0, 0x2c); /* LCD HNDP register */ in n800_dss_init()
733 chip->write(chip->opaque, 1, 0x1e); in n800_dss_init()
734 chip->write(chip->opaque, 0, 0x2e); /* LCD Height 0 register */ in n800_dss_init()
735 chip->write(chip->opaque, 1, 0xe0); in n800_dss_init()
736 chip->write(chip->opaque, 0, 0x30); /* LCD Height 1 register */ in n800_dss_init()
737 chip->write(chip->opaque, 1, 0x01); in n800_dss_init()
738 chip->write(chip->opaque, 0, 0x32); /* LCD VNDP register */ in n800_dss_init()
739 chip->write(chip->opaque, 1, 0x06); in n800_dss_init()
740 chip->write(chip->opaque, 0, 0x68); /* Display Mode register */ in n800_dss_init()
741 chip->write(chip->opaque, 1, 1); /* Enable bit */ in n800_dss_init()
743 chip->write(chip->opaque, 0, 0x6c); in n800_dss_init()
744 chip->write(chip->opaque, 1, 0x00); /* Input X Start Position */ in n800_dss_init()
745 chip->write(chip->opaque, 1, 0x00); /* Input X Start Position */ in n800_dss_init()
746 chip->write(chip->opaque, 1, 0x00); /* Input Y Start Position */ in n800_dss_init()
747 chip->write(chip->opaque, 1, 0x00); /* Input Y Start Position */ in n800_dss_init()
748 chip->write(chip->opaque, 1, 0x1f); /* Input X End Position */ in n800_dss_init()
749 chip->write(chip->opaque, 1, 0x03); /* Input X End Position */ in n800_dss_init()
750 chip->write(chip->opaque, 1, 0xdf); /* Input Y End Position */ in n800_dss_init()
751 chip->write(chip->opaque, 1, 0x01); /* Input Y End Position */ in n800_dss_init()
752 chip->write(chip->opaque, 1, 0x00); /* Output X Start Position */ in n800_dss_init()
753 chip->write(chip->opaque, 1, 0x00); /* Output X Start Position */ in n800_dss_init()
754 chip->write(chip->opaque, 1, 0x00); /* Output Y Start Position */ in n800_dss_init()
755 chip->write(chip->opaque, 1, 0x00); /* Output Y Start Position */ in n800_dss_init()
756 chip->write(chip->opaque, 1, 0x1f); /* Output X End Position */ in n800_dss_init()
757 chip->write(chip->opaque, 1, 0x03); /* Output X End Position */ in n800_dss_init()
758 chip->write(chip->opaque, 1, 0xdf); /* Output Y End Position */ in n800_dss_init()
759 chip->write(chip->opaque, 1, 0x01); /* Output Y End Position */ in n800_dss_init()
760 chip->write(chip->opaque, 1, 0x01); /* Input Data Format */ in n800_dss_init()
761 chip->write(chip->opaque, 1, 0x01); /* Data Source Select */ in n800_dss_init()
773 s->blizzard.write = s1d13745_write; in n8x0_dss_setup()