4  * Copyright (c) 2017-2020 Subbaraya Sundeep <sundeep.lkml@gmail.com>
28 #include "exec/address-spaces.h"
29 #include "hw/char/serial-mm.h"
30 #include "hw/arm/msf2-soc.h"
32 #include "hw/qdev-clock.h"
66     object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M);  in m2sxxx_soc_initfn()
68     object_initialize_child(obj, "sysreg", &s->sysreg, TYPE_MSF2_SYSREG);  in m2sxxx_soc_initfn()
70     object_initialize_child(obj, "timer", &s->timer, TYPE_MSS_TIMER);  in m2sxxx_soc_initfn()
73         object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_MSS_SPI);  in m2sxxx_soc_initfn()
76     object_initialize_child(obj, "emac", &s->emac, TYPE_MSS_EMAC);  in m2sxxx_soc_initfn()
78     s->m3clk = qdev_init_clock_in(DEVICE(obj), "m3clk", NULL, NULL, 0);  in m2sxxx_soc_initfn()
79     s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0);  in m2sxxx_soc_initfn()
91     if (!clock_has_source(s->m3clk)) {  in m2sxxx_soc_realize()
97      * We use s->refclk internally and only define it with qdev_init_clock_in()  in m2sxxx_soc_realize()
101     if (clock_has_source(s->refclk)) {  in m2sxxx_soc_realize()
102         error_setg(errp, "refclk must not be wired up by the board code");  in m2sxxx_soc_realize()
109      * the systick refclk to either /4, /8, /16 or /32, as well as setting  in m2sxxx_soc_realize()
114     clock_set_mul_div(s->refclk, 32, 1);  in m2sxxx_soc_realize()
115     clock_set_source(s->refclk, s->m3clk);  in m2sxxx_soc_realize()
117     memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,  in m2sxxx_soc_realize()
120      * On power-on, the eNVM region 0x60000000 is automatically  in m2sxxx_soc_realize()
121      * remapped to the Cortex-M3 processor executable region  in m2sxxx_soc_realize()
125     memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM",  in m2sxxx_soc_realize()
126                              &s->nvm, 0, s->envm_size);  in m2sxxx_soc_realize()
128     memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm);  in m2sxxx_soc_realize()
129     memory_region_add_subregion(system_memory, 0, &s->nvm_alias);  in m2sxxx_soc_realize()
131     memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size,  in m2sxxx_soc_realize()
133     memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram);  in m2sxxx_soc_realize()
135     armv7m = DEVICE(&s->armv7m);  in m2sxxx_soc_realize()
136     qdev_prop_set_uint32(armv7m, "num-irq", 81);  in m2sxxx_soc_realize()
137     qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));  in m2sxxx_soc_realize()
138     qdev_prop_set_bit(armv7m, "enable-bitband", true);  in m2sxxx_soc_realize()
139     qdev_connect_clock_in(armv7m, "cpuclk", s->m3clk);  in m2sxxx_soc_realize()
140     qdev_connect_clock_in(armv7m, "refclk", s->refclk);  in m2sxxx_soc_realize()
141     object_property_set_link(OBJECT(&s->armv7m), "memory",  in m2sxxx_soc_realize()
143     if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) {  in m2sxxx_soc_realize()
155     dev = DEVICE(&s->timer);  in m2sxxx_soc_realize()
159      * clock-frequency integer property.  in m2sxxx_soc_realize()
161     qdev_prop_set_uint32(dev, "clock-frequency",  in m2sxxx_soc_realize()
162                          clock_get_hz(s->m3clk) / s->apb0div);  in m2sxxx_soc_realize()
163     if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) {  in m2sxxx_soc_realize()
173     dev = DEVICE(&s->sysreg);  in m2sxxx_soc_realize()
174     qdev_prop_set_uint32(dev, "apb0divisor", s->apb0div);  in m2sxxx_soc_realize()
175     qdev_prop_set_uint32(dev, "apb1divisor", s->apb1div);  in m2sxxx_soc_realize()
176     if (!sysbus_realize(SYS_BUS_DEVICE(&s->sysreg), errp)) {  in m2sxxx_soc_realize()
185         if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) {  in m2sxxx_soc_realize()
189         sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);  in m2sxxx_soc_realize()
190         sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,  in m2sxxx_soc_realize()
196                                   OBJECT(&s->spi[i]), "spi");  in m2sxxx_soc_realize()
200     dev = DEVICE(&s->emac);  in m2sxxx_soc_realize()
202     object_property_set_link(OBJECT(&s->emac), "ahb-bus",  in m2sxxx_soc_realize()
204     if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), errp)) {  in m2sxxx_soc_realize()
218     create_unimplemented_device("hs-dma", 0x40014000, 0x1000);  in m2sxxx_soc_realize()
230     DEFINE_PROP_STRING("part-name", MSF2State, part_name),
231     DEFINE_PROP_UINT64("eNVM-size", MSF2State, envm_size, MSF2_ENVM_MAX_SIZE),
232     DEFINE_PROP_UINT64("eSRAM-size", MSF2State, esram_size,
244     dc->realize = m2sxxx_soc_realize;  in m2sxxx_soc_class_init()