Lines Matching +full:integratorcp +full:- +full:cm +full:- +full:core
4 * Copyright (c) 2005-2007 CodeSourcery.
19 #include "exec/address-spaces.h"
23 #include "qemu/error-report.h"
30 #include "target/arm/cpu-qom.h"
98 return s->cm_osc; in integratorcm_read()
100 return s->cm_ctrl; in integratorcm_read()
104 if (s->cm_lock == 0xa05f) { in integratorcm_read()
107 return s->cm_lock; in integratorcm_read()
113 return s->cm_auxosc; in integratorcm_read()
115 return s->cm_sdram; in integratorcm_read()
117 return s->cm_init; in integratorcm_read()
119 /* This register, CM_REFCNT, provides a 32-bit count value. in integratorcm_read()
121 * and can be used as a real-time counter. in integratorcm_read()
124 1000) - s->cm_refcnt_offset; in integratorcm_read()
126 return s->cm_flags; in integratorcm_read()
128 return s->cm_nvflags; in integratorcm_read()
130 return s->int_level & s->irq_enabled; in integratorcm_read()
132 return s->int_level; in integratorcm_read()
134 return s->irq_enabled; in integratorcm_read()
136 return s->int_level & 1; in integratorcm_read()
138 return s->int_level & s->fiq_enabled; in integratorcm_read()
140 return s->int_level; in integratorcm_read()
142 return s->fiq_enabled; in integratorcm_read()
162 memory_region_set_enabled(&s->flash, !(s->cm_ctrl & 4)); in integratorcm_do_remap()
170 if ((s->cm_ctrl ^ value) & 1) { in integratorcm_set_ctrl()
178 s->cm_ctrl = (s->cm_ctrl & ~5) | (value & 5); in integratorcm_set_ctrl()
184 /* ??? The CPU irq/fiq is raised when either the core module or base PIC in integratorcm_update()
186 if (s->int_level & (s->irq_enabled | s->fiq_enabled)) in integratorcm_update()
187 hw_error("Core module interrupt\n"); in integratorcm_update()
196 if (s->cm_lock == 0xa05f) in integratorcm_write()
197 s->cm_osc = value; in integratorcm_write()
203 s->cm_lock = value & 0xffff; in integratorcm_write()
206 if (s->cm_lock == 0xa05f) in integratorcm_write()
207 s->cm_auxosc = value; in integratorcm_write()
210 s->cm_sdram = value; in integratorcm_write()
214 s->cm_init = value; in integratorcm_write()
217 s->cm_flags |= value; in integratorcm_write()
220 s->cm_flags &= ~value; in integratorcm_write()
223 s->cm_nvflags |= value; in integratorcm_write()
226 s->cm_nvflags &= ~value; in integratorcm_write()
229 s->irq_enabled |= value; in integratorcm_write()
233 s->irq_enabled &= ~value; in integratorcm_write()
237 s->int_level |= (value & 1); in integratorcm_write()
241 s->int_level &= ~(value & 1); in integratorcm_write()
245 s->fiq_enabled |= value; in integratorcm_write()
249 s->fiq_enabled &= ~value; in integratorcm_write()
266 /* Integrator/CM control registers. */
278 s->cm_osc = 0x01000048; in integratorcm_init()
280 s->cm_auxosc = 0x0007feff; in integratorcm_init()
281 s->cm_sdram = 0x00011122; in integratorcm_init()
282 memcpy(integrator_spd + 73, "QEMU-MEMORY", 11); in integratorcm_init()
283 s->cm_init = 0x00000112; in integratorcm_init()
284 s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24, in integratorcm_init()
295 if (!memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash", in integratorcm_realize()
300 memory_region_init_io(&s->iomem, OBJECT(d), &integratorcm_ops, s, in integratorcm_realize()
302 sysbus_init_mmio(dev, &s->iomem); in integratorcm_realize()
306 if (s->memsz >= 256) { in integratorcm_realize()
308 s->cm_sdram |= 0x10; in integratorcm_realize()
309 } else if (s->memsz >= 128) { in integratorcm_realize()
311 s->cm_sdram |= 0x0c; in integratorcm_realize()
312 } else if (s->memsz >= 64) { in integratorcm_realize()
314 s->cm_sdram |= 0x08; in integratorcm_realize()
315 } else if (s->memsz >= 32) { in integratorcm_realize()
317 s->cm_sdram |= 0x04; in integratorcm_realize()
358 flags = (s->level & s->irq_enabled); in icp_pic_update()
359 qemu_set_irq(s->parent_irq, flags != 0); in icp_pic_update()
360 flags = (s->level & s->fiq_enabled); in icp_pic_update()
361 qemu_set_irq(s->parent_fiq, flags != 0); in icp_pic_update()
368 s->level |= 1 << irq; in icp_pic_set_irq()
370 s->level &= ~(1 << irq); in icp_pic_set_irq()
381 return s->level & s->irq_enabled; in icp_pic_read()
383 return s->level; in icp_pic_read()
385 return s->irq_enabled; in icp_pic_read()
387 return s->level & 1; in icp_pic_read()
389 return s->level & s->fiq_enabled; in icp_pic_read()
391 return s->level; in icp_pic_read()
393 return s->fiq_enabled; in icp_pic_read()
411 s->irq_enabled |= value; in icp_pic_write()
414 s->irq_enabled &= ~value; in icp_pic_write()
425 s->fiq_enabled |= value; in icp_pic_write()
428 s->fiq_enabled &= ~value; in icp_pic_write()
455 sysbus_init_irq(sbd, &s->parent_irq); in icp_pic_init()
456 sysbus_init_irq(sbd, &s->parent_fiq); in icp_pic_init()
457 memory_region_init_io(&s->iomem, obj, &icp_pic_ops, s, in icp_pic_init()
458 "icp-pic", 0x00800000); in icp_pic_init()
459 sysbus_init_mmio(sbd, &s->iomem); in icp_pic_init()
464 #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
478 #define ICP_GPIO_MMC_WPROT "mmc-wprot"
479 #define ICP_GPIO_MMC_CARDIN "mmc-cardin"
505 return s->intreg_state; in icp_control_read()
522 s->intreg_state &= ~(value & ICP_INTREG_CARDIN); in icp_control_write()
523 qemu_set_irq(s->mmc_irq, !!(s->intreg_state & ICP_INTREG_CARDIN)); in icp_control_write()
545 s->intreg_state &= ~ICP_INTREG_WPROT; in icp_control_mmc_wprot()
547 s->intreg_state |= ICP_INTREG_WPROT; in icp_control_mmc_wprot()
557 s->intreg_state |= ICP_INTREG_CARDIN; in icp_control_mmc_cardin()
558 qemu_set_irq(s->mmc_irq, 1); in icp_control_mmc_cardin()
568 memory_region_init_io(&s->iomem, OBJECT(s), &icp_control_ops, s, in icp_control_init()
570 sysbus_init_mmio(sbd, &s->iomem); in icp_control_init()
575 sysbus_init_irq(sbd, &s->mmc_irq); in icp_control_init()
588 ram_addr_t ram_size = machine->ram_size; in integratorcp_init()
598 cpuobj = object_new(machine->cpu_type); in integratorcp_init()
615 memory_region_add_subregion(address_space_mem, 0, machine->ram); in integratorcp_init()
617 memory_region_init_alias(ram_alias, NULL, "ram.alias", machine->ram, in integratorcp_init()
646 qdev_connect_gpio_out_named(dev, "card-read-only", 0, in integratorcp_init()
648 qdev_connect_gpio_out_named(dev, "card-inserted", 0, in integratorcp_init()
657 qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"), in integratorcp_init()
662 if (machine->audiodev) { in integratorcp_init()
663 qdev_prop_set_string(dev, "audiodev", machine->audiodev); in integratorcp_init()
674 object_property_set_link(OBJECT(dev), "framebuffer-memory", in integratorcp_init()
686 mc->desc = "ARM Integrator/CP (ARM926EJ-S)"; in integratorcp_machine_init()
687 mc->init = integratorcp_init; in integratorcp_machine_init()
688 mc->ignore_memory_transaction_failures = true; in integratorcp_machine_init()
689 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); in integratorcp_machine_init()
690 mc->default_ram_id = "integrator.ram"; in integratorcp_machine_init()
695 DEFINE_MACHINE("integratorcp", integratorcp_machine_init)
707 dc->realize = integratorcm_realize; in core_class_init()
708 dc->vmsd = &vmstate_integratorcm; in core_class_init()
715 dc->vmsd = &vmstate_icp_pic; in icp_pic_class_init()
722 dc->vmsd = &vmstate_icp_control; in icp_control_class_init()