Lines Matching +full:0 +full:x1e650000
21 #define ASPEED_SOC_IOMEM_SIZE 0x00200000
22 #define ASPEED_SOC_DPMCU_SIZE 0x00040000
25 [ASPEED_DEV_SPI_BOOT] = 0x00000000,
26 [ASPEED_DEV_SRAM] = 0x10000000,
27 [ASPEED_DEV_DPMCU] = 0x18000000,
28 /* 0x16000000 0x17FFFFFF : AHB BUS do LPC Bus bridge */
29 [ASPEED_DEV_IOMEM] = 0x1E600000,
30 [ASPEED_DEV_PWM] = 0x1E610000,
31 [ASPEED_DEV_FMC] = 0x1E620000,
32 [ASPEED_DEV_SPI1] = 0x1E630000,
33 [ASPEED_DEV_SPI2] = 0x1E631000,
34 [ASPEED_DEV_EHCI1] = 0x1E6A1000,
35 [ASPEED_DEV_EHCI2] = 0x1E6A3000,
36 [ASPEED_DEV_UHCI] = 0x1E6B0000,
37 [ASPEED_DEV_MII1] = 0x1E650000,
38 [ASPEED_DEV_MII2] = 0x1E650008,
39 [ASPEED_DEV_MII3] = 0x1E650010,
40 [ASPEED_DEV_MII4] = 0x1E650018,
41 [ASPEED_DEV_ETH1] = 0x1E660000,
42 [ASPEED_DEV_ETH3] = 0x1E670000,
43 [ASPEED_DEV_ETH2] = 0x1E680000,
44 [ASPEED_DEV_ETH4] = 0x1E690000,
45 [ASPEED_DEV_VIC] = 0x1E6C0000,
46 [ASPEED_DEV_HACE] = 0x1E6D0000,
47 [ASPEED_DEV_SDMC] = 0x1E6E0000,
48 [ASPEED_DEV_SCU] = 0x1E6E2000,
49 [ASPEED_DEV_GFX] = 0x1E6E6000,
50 [ASPEED_DEV_XDMA] = 0x1E6E7000,
51 [ASPEED_DEV_ADC] = 0x1E6E9000,
52 [ASPEED_DEV_DP] = 0x1E6EB000,
53 [ASPEED_DEV_PCIE_PHY1] = 0x1E6ED000,
54 [ASPEED_DEV_PCIE_PHY2] = 0x1E6ED200,
55 [ASPEED_DEV_SBC] = 0x1E6F2000,
56 [ASPEED_DEV_EMMC_BC] = 0x1E6f5000,
57 [ASPEED_DEV_VIDEO] = 0x1E700000,
58 [ASPEED_DEV_SDHCI] = 0x1E740000,
59 [ASPEED_DEV_EMMC] = 0x1E750000,
60 [ASPEED_DEV_PCIE] = 0x1E770000,
61 [ASPEED_DEV_GPIO] = 0x1E780000,
62 [ASPEED_DEV_GPIO_1_8V] = 0x1E780800,
63 [ASPEED_DEV_RTC] = 0x1E781000,
64 [ASPEED_DEV_TIMER1] = 0x1E782000,
65 [ASPEED_DEV_WDT] = 0x1E785000,
66 [ASPEED_DEV_LPC] = 0x1E789000,
67 [ASPEED_DEV_IBT] = 0x1E789140,
68 [ASPEED_DEV_I2C] = 0x1E78A000,
69 [ASPEED_DEV_PECI] = 0x1E78B000,
70 [ASPEED_DEV_UART1] = 0x1E783000,
71 [ASPEED_DEV_UART2] = 0x1E78D000,
72 [ASPEED_DEV_UART3] = 0x1E78E000,
73 [ASPEED_DEV_UART4] = 0x1E78F000,
74 [ASPEED_DEV_UART5] = 0x1E784000,
75 [ASPEED_DEV_UART6] = 0x1E790000,
76 [ASPEED_DEV_UART7] = 0x1E790100,
77 [ASPEED_DEV_UART8] = 0x1E790200,
78 [ASPEED_DEV_UART9] = 0x1E790300,
79 [ASPEED_DEV_UART10] = 0x1E790400,
80 [ASPEED_DEV_UART11] = 0x1E790500,
81 [ASPEED_DEV_UART12] = 0x1E790600,
82 [ASPEED_DEV_UART13] = 0x1E790700,
83 [ASPEED_DEV_VUART] = 0x1E787000,
84 [ASPEED_DEV_FSI1] = 0x1E79B000,
85 [ASPEED_DEV_FSI2] = 0x1E79B100,
86 [ASPEED_DEV_I3C] = 0x1E7A0000,
87 [ASPEED_DEV_PCIE_MMIO1] = 0x60000000,
88 [ASPEED_DEV_PCIE_MMIO2] = 0x70000000,
89 [ASPEED_DEV_SDRAM] = 0x80000000,
92 #define ASPEED_A7MPCORE_ADDR 0x40460000
113 [ASPEED_DEV_SDMC] = 0,
174 for (i = 0; i < sc->num_cpus; i++) { in aspeed_soc_ast2600_init()
198 for (i = 0; i < sc->wdts_num; i++) { in aspeed_soc_ast2600_init()
211 for (i = 0; i < ARRAY_SIZE(s->pcie_phy); i++) { in aspeed_soc_ast2600_init()
221 for (i = 0; i < sc->spis_num; i++) { in aspeed_soc_ast2600_init()
226 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_soc_ast2600_init()
238 for (i = 0; i < sc->macs_num; i++) { in aspeed_soc_ast2600_init()
245 for (i = 0; i < sc->uarts_num; i++) { in aspeed_soc_ast2600_init()
264 for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { in aspeed_soc_ast2600_init()
273 object_initialize_child(obj, "emmc-controller.sdhci", &s->emmc.slots[0], in aspeed_soc_ast2600_init()
294 for (i = 0; i < ASPEED_FSI_NUM; i++) { in aspeed_soc_ast2600_init()
304 * ASPEED ast2600 has 0xf as cluster ID
310 return (0xf << ARM_AFF1_SHIFT) | cpu; in aspeed_calc_affinity()
325 "aspeed.spi_boot_container", 0x10000000); in aspeed_soc_ast2600_realize()
336 sc->memmap[ASPEED_DEV_VIDEO], 0x1000); in aspeed_soc_ast2600_realize()
341 sc->memmap[ASPEED_DEV_EMMC_BC], 0x1000); in aspeed_soc_ast2600_realize()
344 for (i = 0; i < sc->num_cpus; i++) { in aspeed_soc_ast2600_realize()
374 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->a7mpcore), 0, ASPEED_A7MPCORE_ADDR); in aspeed_soc_ast2600_realize()
376 for (i = 0; i < sc->num_cpus; i++) { in aspeed_soc_ast2600_realize()
391 sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index); in aspeed_soc_ast2600_realize()
408 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); in aspeed_soc_ast2600_realize()
414 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); in aspeed_soc_ast2600_realize()
415 sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, in aspeed_soc_ast2600_realize()
424 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0, in aspeed_soc_ast2600_realize()
426 for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { in aspeed_soc_ast2600_realize()
432 for (i = 0; i < sc->wdts_num; i++) { in aspeed_soc_ast2600_realize()
440 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, in aspeed_soc_ast2600_realize()
448 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); in aspeed_soc_ast2600_realize()
449 sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, in aspeed_soc_ast2600_realize()
463 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); in aspeed_soc_ast2600_realize()
464 for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) { in aspeed_soc_ast2600_realize()
468 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq); in aspeed_soc_ast2600_realize()
475 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0, in aspeed_soc_ast2600_realize()
477 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0, in aspeed_soc_ast2600_realize()
481 for (i = 0; i < ARRAY_SIZE(s->pcie_phy); i++) { in aspeed_soc_ast2600_realize()
485 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie_phy[i]), 0, in aspeed_soc_ast2600_realize()
492 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pcie), 0, in aspeed_soc_ast2600_realize()
495 for (i = 0; i < ARRAY_SIZE(s->pcie.rcs); i++) { in aspeed_soc_ast2600_realize()
498 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie.rcs[i]), 0, irq); in aspeed_soc_ast2600_realize()
501 for (i = 0; i < ARRAY_SIZE(s->pcie.rcs); i++) { in aspeed_soc_ast2600_realize()
511 0x10000000); in aspeed_soc_ast2600_realize()
526 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); in aspeed_soc_ast2600_realize()
529 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, in aspeed_soc_ast2600_realize()
533 MemoryRegion *fmc0_mmio = &s->fmc.flashes[0].mmio; in aspeed_soc_ast2600_realize()
535 fmc0_mmio, 0, memory_region_size(fmc0_mmio)); in aspeed_soc_ast2600_realize()
536 memory_region_add_subregion(&s->spi_boot_container, 0x0, &s->spi_boot); in aspeed_soc_ast2600_realize()
539 for (i = 0; i < sc->spis_num; i++) { in aspeed_soc_ast2600_realize()
545 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_soc_ast2600_realize()
552 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_soc_ast2600_realize()
560 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ehci[i]), 0, in aspeed_soc_ast2600_realize()
562 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, in aspeed_soc_ast2600_realize()
572 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->uhci), 0, in aspeed_soc_ast2600_realize()
574 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uhci), 0, in aspeed_soc_ast2600_realize()
581 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0, in aspeed_soc_ast2600_realize()
590 for (i = 0; i < sc->macs_num; i++) { in aspeed_soc_ast2600_realize()
596 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, in aspeed_soc_ast2600_realize()
598 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, in aspeed_soc_ast2600_realize()
607 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->mii[i]), 0, in aspeed_soc_ast2600_realize()
615 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->xdma), 0, in aspeed_soc_ast2600_realize()
617 sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, in aspeed_soc_ast2600_realize()
624 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, in aspeed_soc_ast2600_realize()
626 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, in aspeed_soc_ast2600_realize()
632 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio_1_8v), 0, in aspeed_soc_ast2600_realize()
634 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio_1_8v), 0, in aspeed_soc_ast2600_realize()
641 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0, in aspeed_soc_ast2600_realize()
643 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, in aspeed_soc_ast2600_realize()
650 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->emmc), 0, in aspeed_soc_ast2600_realize()
652 sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, in aspeed_soc_ast2600_realize()
659 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]); in aspeed_soc_ast2600_realize()
662 sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0, in aspeed_soc_ast2600_realize()
671 * offset 0. in aspeed_soc_ast2600_realize()
696 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ibt), 0, in aspeed_soc_ast2600_realize()
705 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0, in aspeed_soc_ast2600_realize()
707 sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, in aspeed_soc_ast2600_realize()
714 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]); in aspeed_soc_ast2600_realize()
715 for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) { in aspeed_soc_ast2600_realize()
719 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq); in aspeed_soc_ast2600_realize()
726 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]); in aspeed_soc_ast2600_realize()
729 for (i = 0; i < ASPEED_FSI_NUM; i++) { in aspeed_soc_ast2600_realize()
733 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fsi[i]), 0, in aspeed_soc_ast2600_realize()
735 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fsi[i]), 0, in aspeed_soc_ast2600_realize()
743 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gfx), 0, sc->memmap[ASPEED_DEV_GFX]); in aspeed_soc_ast2600_realize()
744 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gfx), 0, in aspeed_soc_ast2600_realize()
751 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pwm), 0, sc->memmap[ASPEED_DEV_PWM]); in aspeed_soc_ast2600_realize()
752 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwm), 0, in aspeed_soc_ast2600_realize()
779 sc->sram_size = 0x16400; in aspeed_soc_ast2600_class_init()