Lines Matching refs:selector
25 Setting the selector register will cause the data offset to be set
29 Bit14 of the selector register indicates whether the configuration
34 the selector value is between 0x4000-0x7fff or 0xc000-0xffff.
43 governed independently of Bit14 in the selector key value.
45 Bit15 of the selector register indicates whether the configuration
49 items are accessed with a selector value between 0x0000-0x7fff, and
50 architecture specific configuration items are accessed with a selector
64 selector register. In other words, the two ports overlap, and can not
69 the selector register, as described above.
71 Initially following a write to the selector register, the data offset
113 The presence of the fw_cfg selector and data registers can be verified
135 Firmware configuration items stored at selector keys 0x0020 or higher
148 uint16_t select; /* selector key of fw_cfg item, big-endian */
157 of selector keys and their respective items' purpose, format and writeability.
215 This has the same effect as writing the selector register.
218 ``length`` bytes for the current selector and offset will be copied into the
223 specified by the ``address`` field to the current selector and offset. QEMU
225 with the current selector (i.e., the item cannot be resized). Truncated writes
230 operation will be performed. The offset for the current selector will be
247 Since v2.4, "file" fw_cfg items (i.e., items with selector keys above