Lines Matching +full:0 +full:x40000

34 PCI Region 0:
41 Only ``size == 4`` accesses are allowed for addresses ``< 0x80``.
44 0x00 (RO) : identification
45             Value is in the form ``0xRRrr00edu`` where:
49 0x04 (RW) : card liveness check
52 0x08 (RW) : factorial computation
54 	    This happens only after factorial bit in the status register (0x20
57 0x20 (RW) : status register
60             0x01
62 	    0x80
65 0x24 (RO) : interrupt status register
69 0x60 (WO) : interrupt raise register
73 0x64 (WO) : interrupt acknowledge register
78 0x80 (RW) : DMA source address
81 0x88 (RW) : DMA destination address
84 0x90 (RW) : DMA transfer count
87 0x98 (RW) : DMA command register
90             0x01
92 	    0x02
93               direction (0: from RAM to EDU, 1: from EDU to RAM)
94 	    0x04
95               raise interrupt 0x100 after finishing the DMA
113 4096 bytes long buffer at offset 0x40000 is available in the EDU device. I.e.
122   0x40000  -> DMA destination address
130   0x40000  -> DMA source address