Lines Matching refs:bypass
8 is not flexible. We introduce this bypass iommu property to support
14 determine whether the devices attached on the PCI host bridge will bypass
17 bypass vIOMMU. When bypass_iommu property is not set for a host bridge,
22 The bypass iommu feature support PXB host bridge and default main host
26 on AArch64. Other machine types do not support bypass iommu for default
29 1. The following is the bypass iommu options:
34 (3) X86 default root bus bypass iommu:
46 - a default host bridge which bypass SMMUv3
48 - a pxb host bridge which bypass SMMUv3
60 - a default host bridge which bypass iommu
62 - a pxb host bridge which bypass iommu
66 There might be potential security risk when devices bypass iommu, because
68 iommu isolation. So it would be necessary to only bypass iommu for trusted
73 The bypass iommu feature includes:
75 Add bypass iommu property check of PCI Host and do not get iommu address
76 space for devices bypass iommu.
79 RID mapping for devices which do not bypass iommu.
82 of devices which do not bypass iommu, then fill the DMAR drhd struct with
83 explicit device scope info. To support AMD iommu, add check of bypass iommu
86 We add bypass iommu options in machine option for default root bus, and add
87 option for PXB also. Note that the default value of bypass iommu is false,