qemu/docs/bypass-iommu.txt

1 BYPASS IOMMU PROPERTY
8 is not flexible. We introduce this bypass iommu property to support
10 passthrough devices with no-iommu mode and devices go through vIOMMU in
15 virtual iommu. The bypass_iommu property is valid only when there is a
16 virtual iommu in the system, it is implemented to allow some devices to
22 The bypass iommu feature support PXB host bridge and default main host
26 on AArch64. Other machine types do not support bypass iommu for default
29 1. The following is the bypass iommu options:
33      qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
34  (3) X86 default root bus bypass iommu:
41  -machine virt,kernel_irqchip=on,iommu=smmuv3,default_bus_bypass_iommu=true \
57  -device intel-iommu \
60  - a default host bridge which bypass iommu
61  - a pxb host bridge which go through iommu
62  - a pxb host bridge which bypass iommu
66 There might be potential security risk when devices bypass iommu, because
68 iommu isolation. So it would be necessary to only bypass iommu for trusted
73 The bypass iommu feature includes:
75    Add bypass iommu property check of PCI Host and do not get iommu address
76    space for devices bypass iommu.
79    RID mapping for devices which do not bypass iommu.
80  - X86 IOMMU support
81    To support Intel iommu, we traverse all PCI host bridge and get information
82    of devices which do not bypass iommu, then fill the DMAR drhd struct with
83    explicit device scope info. To support AMD iommu, add check of bypass iommu
86    We add bypass iommu options in machine option for default root bus, and add
87    option for PXB also. Note that the default value of bypass iommu is false,
88    so that the devices will by default go through iommu if there exist one.