Lines Matching +full:stream +full:- +full:match +full:- +full:mask
3 * include/opcode/sparc.h, opcodes/sparc-opc.c, opcodes/sparc-dis.c
30 #include "disas/dis-asm.h"
33 the opcodes library in sparc-opc.c. If you change anything here, make
36 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
43 returns non-zero.
44 The values are indices into `sparc_opcode_archs' defined in sparc-opc.c.
45 Don't change this without updating sparc-opc.c. */
62 #define SPARC_OPCODE_ARCH_MAX (SPARC_OPCODE_ARCH_BAD - 1)
68 /* Given a valid sparc_opcode_arch_val, return non-zero if it's v9. */
76 /* Mask of sparc_opcode_arch_val's supported.
88 unsigned long match; /* Bits that must be set. */ member
108 The match component is a mask saying which bits must match a particular
137 K MEMBAR mask (7 bits). (v9)
161 w Window invalid mask register.
221 fill-column: 131
222 comment-column: 0
225 /* opcodes/sparc-opc.c */
248 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
397 'ld' pseudo-op in v9. */
1243 a single-line description of each condition value. John Gilmore. */
1245 /* Define branches -- one annulled, one without, etc. */
1246 #define br(opcode, mask, lose, flags) \ argument
1247 { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \
1248 { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 }
1250 #define brx(opcode, mask, lose, flags) /* v9 */ \ argument
1251 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), "Z,G", (flags), v9 }, \
1252 { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), ",T Z,G", (flags), v9 }, \
1253 { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a Z,G", (flags), v9 }, \
1254 { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a,T Z,G", (flags), v9 }, \
1255 { opcode, (mask)|(2<<20), ANNUL|BPRED|(lose), ",N Z,G", (flags), v9 }, \
1256 { opcode, (mask)|(2<<20)|ANNUL, BPRED|(lose), ",a,N Z,G", (flags), v9 }, \
1257 { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), "z,G", (flags), v9 }, \
1258 { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), ",T z,G", (flags), v9 }, \
1259 { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a z,G", (flags), v9 }, \
1260 { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a,T z,G", (flags), v9 }, \
1261 { opcode, (mask), ANNUL|BPRED|(lose)|(2<<20), ",N z,G", (flags), v9 }, \
1262 { opcode, (mask)|ANNUL, BPRED|(lose)|(2<<20), ",a,N z,G", (flags), v9 }
1265 #define tr(opcode, mask, lose, flags) \ argument
1266 { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i", (flags), v9 }, /* %g0 + imm */ \
1267 { opcode, (mask)|(2<<11)|IMMED, (lose), "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
1268 { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
1269 { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1", (flags), v9 }, /* rs1 + %g0 */ \
1270 { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i", (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
1271 { opcode, (mask)|IMMED, (lose), "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
1272 { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
1273 { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
1274 { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \
1275 { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \
1276 { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \
1277 { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */
1279 /* v9: We must put `brx' before `br', to ensure that we never match something
1282 v9: are not deleted if the pattern fails to match. */
1284 /* Define both branches and traps based on condition mask */
1285 #define cond(bop, top, mask, flags) \ argument
1286 brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
1287 br(bop, F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
1288 …tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), ((flags) & ~(F_UNBR|F_CONDBR)…
1325 #define brr(opcode, mask, lose, flags) /* v9 */ \ argument
1326 { opcode, (mask)|BPRED, ANNUL|(lose), "1,k", F_DELAYED|(flags), v9 }, \
1327 { opcode, (mask)|BPRED, ANNUL|(lose), ",T 1,k", F_DELAYED|(flags), v9 }, \
1328 { opcode, (mask)|BPRED|ANNUL, (lose), ",a 1,k", F_DELAYED|(flags), v9 }, \
1329 { opcode, (mask)|BPRED|ANNUL, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }, \
1330 { opcode, (mask), ANNUL|BPRED|(lose), ",N 1,k", F_DELAYED|(flags), v9 }, \
1331 { opcode, (mask)|ANNUL, BPRED|(lose), ",a,N 1,k", F_DELAYED|(flags), v9 }
1333 #define condr(bop, mask, flags) /* v9 */ \ argument
1334 brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
1346 #define movr(opcode, mask, flags) /* v9 */ \ argument
1347 { opcode, F3(2, 0x2f, 0)|RCOND(mask), F3(~2, ~0x2f, ~0)|RCOND(~(mask)), "1,2,d", (flags), v9 }, \
1348 { opcode, F3(2, 0x2f, 1)|RCOND(mask), F3(~2, ~0x2f, ~1)|RCOND(~(mask)), "1,j,d", (flags), v9 }
1350 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \ argument
1351 { opcode, (mask), (lose), "1,f,g", (flags) | F_FLOAT, v9 }
1352 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \ argument
1353 { opcode, (mask), (lose), "1,B,H", (flags) | F_FLOAT, v9 }
1354 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \ argument
1355 { opcode, (mask), (lose), "1,R,J", (flags) | F_FLOAT, v9 }
1357 #define fmovrs(mop, mask, flags) /* v9 */ \ argument
1358 …fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (…
1359 #define fmovrd(mop, mask, flags) /* v9 */ \ argument
1360 …fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (…
1361 #define fmovrq(mop, mask, flags) /* v9 */ \ argument
1362 …fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (…
1457 #define FM_SF 1 /* v9 - values for fpsize */
1535 #define CBR(opcode, mask, lose, flags, arch) \ argument
1536 { opcode, (mask), ANNUL | (lose), "l", flags | F_DELAYED, arch }, \
1537 { opcode, (mask) | ANNUL, (lose), ",a l", flags | F_DELAYED, arch }
1540 #define FBR(opcode, mask, lose, flags) \ argument
1541 { opcode, (mask), ANNUL | (lose), "l", flags | F_DELAYED | F_FBR, v6 }, \
1542 { opcode, (mask) | ANNUL, (lose), ",a l", flags | F_DELAYED | F_FBR, v6 }
1545 #define FBRX(opcode, mask, lose, flags) /* v9 */ \ argument
1546 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED|F_FBR, v9 }, \
1547 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED|F_FBR, v9 }, \
1548 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED|F_FBR, v9 }, \
1549 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED|F_FBR, v9 }, \
1550 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G", flags|F_DELAYED|F_FBR, v9 }, \
1551 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED|F_FBR, v9 }, \
1552 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), "7,G", flags|F_DELAYED|F_FBR, v9 }, \
1553 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G", flags|F_DELAYED|F_FBR, v9 }, \
1554 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a 7,G", flags|F_DELAYED|F_FBR, v9 }, \
1555 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED|F_FBR, v9 }, \
1556 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G", flags|F_DELAYED|F_FBR, v9 }, \
1557 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED|F_FBR, v9 }, \
1558 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), "8,G", flags|F_DELAYED|F_FBR, v9 }, \
1559 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G", flags|F_DELAYED|F_FBR, v9 }, \
1560 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a 8,G", flags|F_DELAYED|F_FBR, v9 }, \
1561 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED|F_FBR, v9 }, \
1562 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G", flags|F_DELAYED|F_FBR, v9 }, \
1563 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED|F_FBR, v9 }, \
1564 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), "9,G", flags|F_DELAYED|F_FBR, v9 }, \
1565 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G", flags|F_DELAYED|F_FBR, v9 }, \
1566 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a 9,G", flags|F_DELAYED|F_FBR, v9 }, \
1567 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED|F_FBR, v9 }, \
1568 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED|F_FBR, v9 }, \
1569 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED|F_FBR, v9 }
1571 /* v9: We must put `FBRX' before `FBR', to ensure that we never match
1574 v9: but are not deleted if the pattern fails to match. */
1576 #define CONDFC(fop, cop, mask, flags) \ argument
1577 FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1578 FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
1579 CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6notlet)
1581 #define CONDFCL(fop, cop, mask, flags) \ argument
1582 FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1583 FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
1584 CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6)
1586 #define CONDF(fop, mask, flags) \ argument
1587 FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1588 FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
1845 #define SLCBCC2(opcode, mask, lose) \ argument
1846 { opcode, (mask), ANNUL|(lose), "l", F_DELAYED|F_CONDBR, sparclet }, \
1847 { opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR, sparclet }
1848 #define SLCBCC(opcode, mask) \ argument
1849 SLCBCC2(opcode, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)))
1853 /*SLCBCC("cbn", 0), - already defined */
1861 /*SLCBCC("cba", 8), - already defined */
2026 for (p = table; p->name; ++p) in lookup_value()
2027 if (value == p->value) in lookup_value()
2028 return p->name; in lookup_value()
2226 /* opcodes/sparc-dis.c */
2250 #define V9_ONLY_P(insn) (! ((insn)->architecture & ~MASK_V9))
2252 #define V9_P(insn) (((insn)->architecture & MASK_V9) != 0)
2275 /* Sign-extend a value which is N bits long. */
2277 ((((int)(value)) << ((8 * sizeof (int)) - bits)) \
2278 >> ((8 * sizeof (int)) - bits) )
2306 /* "ver" - special cased */
2321 rd and wr insns (-16). */
2336 #define X_IMM(i,n) (((i) >> 0) & ((1 << (n)) - 1))
2348 before the shift and mask macros were written.
2412 for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next) in is_delayed_branch()
2414 const sparc_opcode *opcode = op->opcode; in is_delayed_branch()
2416 if ((opcode->match & insn) == opcode->match in is_delayed_branch()
2417 && (opcode->lose & insn) == 0) in is_delayed_branch()
2418 return opcode->flags & F_DELAYED; in is_delayed_branch()
2425 /* Records current mask of SPARC_OPCODE_ARCH_FOO values, used to pass value
2429 /* Given BFD mach number, return a mask of SPARC_OPCODE_ARCH_FOO values. */
2468 unsigned long int match0 = op0->match, match1 = op1->match; in compare_opcodes()
2469 unsigned long int lose0 = op0->lose, lose1 = op1->lose; in compare_opcodes()
2477 if (op0->architecture & current_arch_mask) in compare_opcodes()
2479 if (! (op1->architecture & current_arch_mask)) in compare_opcodes()
2480 return -1; in compare_opcodes()
2484 if (op1->architecture & current_arch_mask) in compare_opcodes()
2486 else if (op0->architecture != op1->architecture) in compare_opcodes()
2487 return op0->architecture - op1->architecture; in compare_opcodes()
2490 /* If a bit is set in both match and lose, there is something in compare_opcodes()
2496 /* xgettext:c-format */ in compare_opcodes()
2497 "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n", in compare_opcodes()
2498 op0->name, match0, lose0); in compare_opcodes()
2499 op0->lose &= ~op0->match; in compare_opcodes()
2500 lose0 = op0->lose; in compare_opcodes()
2507 /* xgettext:c-format */ in compare_opcodes()
2508 "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n", in compare_opcodes()
2509 op1->name, match1, lose1); in compare_opcodes()
2510 op1->lose &= ~op1->match; in compare_opcodes()
2511 lose1 = op1->lose; in compare_opcodes()
2523 return x1 - x0; in compare_opcodes()
2533 return x1 - x0; in compare_opcodes()
2541 int alias_diff = (op0->flags & F_ALIAS) - (op1->flags & F_ALIAS); in compare_opcodes()
2550 i = strcmp (op0->name, op1->name); in compare_opcodes()
2553 if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */ in compare_opcodes()
2557 /* xgettext:c-format */ in compare_opcodes()
2558 "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n", in compare_opcodes()
2559 op0->name, op1->name); in compare_opcodes()
2564 int length_diff = strlen (op0->args) - strlen (op1->args); in compare_opcodes()
2573 char *p0 = (char *) strchr (op0->args, '+'); in compare_opcodes()
2574 char *p1 = (char *) strchr (op1->args, '+'); in compare_opcodes()
2580 so the following [-1]'s are valid. */ in compare_opcodes()
2581 if (p0[-1] == 'i' && p1[1] == 'i') in compare_opcodes()
2584 if (p0[1] == 'i' && p1[-1] == 'i') in compare_opcodes()
2586 return -1; in compare_opcodes()
2592 int i0 = strncmp (op0->args, "i,1", 3) == 0; in compare_opcodes()
2593 int i1 = strncmp (op1->args, "i,1", 3) == 0; in compare_opcodes()
2596 return i0 - i1; in compare_opcodes()
2627 for (i = num_opcodes - 1; i >= 0; --i) in build_hash_table()
2629 int hash = HASH_INSN (opcode_table[i]->match); in build_hash_table()
2632 h->next = hash_table[hash]; in build_hash_table()
2633 h->opcode = opcode_table[i]; in build_hash_table()
2658 /* Print one instruction from MEMADDR on INFO->STREAM.
2669 FILE *stream = info->stream; in print_insn_sparc() local
2680 || info->mach != current_mach) in print_insn_sparc()
2684 current_arch_mask = compute_arch_mask (info->mach); in print_insn_sparc()
2696 current_mach = info->mach; in print_insn_sparc()
2702 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info); in print_insn_sparc()
2706 (*info->memory_error_func) (status, memaddr, info); in print_insn_sparc()
2707 return -1; in print_insn_sparc()
2712 are always big-endian even when the machine is in little-endian mode. */ in print_insn_sparc()
2713 if (info->endian == BFD_ENDIAN_BIG || info->mach == bfd_mach_sparc_sparclite) in print_insn_sparc()
2720 info->insn_info_valid = 1; /* We do return this info. */ in print_insn_sparc()
2721 info->insn_type = dis_nonbranch; /* Assume non branch insn. */ in print_insn_sparc()
2722 info->branch_delay_insns = 0; /* Assume no delay. */ in print_insn_sparc()
2723 info->target = 0; /* Assume no target known. */ in print_insn_sparc()
2725 for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next) in print_insn_sparc()
2727 const sparc_opcode *opcode = op->opcode; in print_insn_sparc()
2730 if (! (opcode->architecture & current_arch_mask)) in print_insn_sparc()
2733 if ((opcode->match & insn) == opcode->match in print_insn_sparc()
2734 && (opcode->lose & insn) == 0) in print_insn_sparc()
2750 if (opcode->match == 0x80102000) /* or */ in print_insn_sparc()
2752 if (opcode->match == 0x80002000) /* add */ in print_insn_sparc()
2756 && strchr (opcode->args, 'r') != NULL) in print_insn_sparc()
2760 && strchr (opcode->args, 'O') != NULL) in print_insn_sparc()
2764 (*info->fprintf_func) (stream, "%s", opcode->name); in print_insn_sparc()
2769 if (opcode->args[0] != ',') in print_insn_sparc()
2770 (*info->fprintf_func) (stream, " "); in print_insn_sparc()
2772 for (s = opcode->args; *s != '\0'; ++s) in print_insn_sparc()
2776 (*info->fprintf_func) (stream, ","); in print_insn_sparc()
2781 (*info->fprintf_func) (stream, "a"); in print_insn_sparc()
2786 (*info->fprintf_func) (stream, "pn"); in print_insn_sparc()
2791 (*info->fprintf_func) (stream, "pt"); in print_insn_sparc()
2800 (*info->fprintf_func) (stream, " "); in print_insn_sparc()
2809 (*info->fprintf_func) (stream, "%c", *s); in print_insn_sparc()
2813 (*info->fprintf_func) (stream, "0"); in print_insn_sparc()
2816 #define reg(n) (*info->fprintf_func) (stream, "%%%s", reg_names[n]) in print_insn_sparc()
2832 #define freg(n) (*info->fprintf_func) (stream, "%%%s", freg_names[n]) in print_insn_sparc()
2833 #define fregx(n) (*info->fprintf_func) (stream, "%%%s", freg_names[((n) & ~1) | (((n) & 1) <… in print_insn_sparc()
2860 #define creg(n) (*info->fprintf_func) (stream, "%%c%u", (unsigned int) (n)) in print_insn_sparc()
2875 (*info->fprintf_func) (stream, "%%hi(%#x)", in print_insn_sparc()
2904 (*info->fprintf_func) (stream, "%d", imm); in print_insn_sparc()
2906 (*info->fprintf_func) (stream, "%#x", imm); in print_insn_sparc()
2916 (info->fprintf_func) (stream, "%d", imm); in print_insn_sparc()
2918 (info->fprintf_func) (stream, "%#x", (unsigned) imm); in print_insn_sparc()
2923 (info->fprintf_func) (stream, "%ld", X_IMM (insn, 3)); in print_insn_sparc()
2928 int mask = X_MEMBAR (insn); in print_insn_sparc() local
2932 if (mask == 0) in print_insn_sparc()
2933 (info->fprintf_func) (stream, "0"); in print_insn_sparc()
2937 if (mask & bit) in print_insn_sparc()
2940 (info->fprintf_func) (stream, "|"); in print_insn_sparc()
2942 (info->fprintf_func) (stream, "%s", name); in print_insn_sparc()
2951 info->target = memaddr + SEX (X_DISP16 (insn), 16) * 4; in print_insn_sparc()
2952 (*info->print_address_func) (info->target, info); in print_insn_sparc()
2956 info->target = memaddr + SEX (X_DISP19 (insn), 19) * 4; in print_insn_sparc()
2957 (*info->print_address_func) (info->target, info); in print_insn_sparc()
2964 (*info->fprintf_func) (stream, "%%fcc%c", *s - '6' + '0'); in print_insn_sparc()
2968 (*info->fprintf_func) (stream, "%%icc"); in print_insn_sparc()
2972 (*info->fprintf_func) (stream, "%%xcc"); in print_insn_sparc()
2976 (*info->fprintf_func) (stream, "%%ccr"); in print_insn_sparc()
2980 (*info->fprintf_func) (stream, "%%fprs"); in print_insn_sparc()
2984 (*info->fprintf_func) (stream, "%%asi"); in print_insn_sparc()
2988 (*info->fprintf_func) (stream, "%%tick"); in print_insn_sparc()
2992 (*info->fprintf_func) (stream, "%%pc"); in print_insn_sparc()
2997 (*info->fprintf_func) (stream, "%%ver"); in print_insn_sparc()
2999 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3002 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3007 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3010 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3015 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3018 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3023 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3026 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3031 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3033 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3034 v9a_asr_reg_names[X_RS1 (insn)-16]); in print_insn_sparc()
3039 (*info->fprintf_func) (stream, "%%reserved"); in print_insn_sparc()
3041 (*info->fprintf_func) (stream, "%%%s", in print_insn_sparc()
3042 v9a_asr_reg_names[X_RD (insn)-16]); in print_insn_sparc()
3050 (*info->fprintf_func) (stream, "%s", name); in print_insn_sparc()
3052 (*info->fprintf_func) (stream, "%ld", X_RD (insn)); in print_insn_sparc()
3057 (*info->fprintf_func) (stream, "%%asr%ld", X_RS1 (insn)); in print_insn_sparc()
3061 (*info->fprintf_func) (stream, "%%asr%ld", X_RD (insn)); in print_insn_sparc()
3065 info->target = memaddr + SEX (X_DISP30 (insn), 30) * 4; in print_insn_sparc()
3066 (*info->print_address_func) (info->target, info); in print_insn_sparc()
3070 (*info->fprintf_func) in print_insn_sparc()
3071 (stream, "%#x", SEX (X_DISP22 (insn), 22)); in print_insn_sparc()
3075 info->target = memaddr + SEX (X_DISP22 (insn), 22) * 4; in print_insn_sparc()
3076 (*info->print_address_func) (info->target, info); in print_insn_sparc()
3083 if ((info->mach == bfd_mach_sparc_v8plusa) || in print_insn_sparc()
3084 ((info->mach >= bfd_mach_sparc_v9) && in print_insn_sparc()
3085 (info->mach <= bfd_mach_sparc_v9b))) in print_insn_sparc()
3091 (*info->fprintf_func) (stream, "%s", name); in print_insn_sparc()
3093 (*info->fprintf_func) (stream, "(%ld)", X_ASI (insn)); in print_insn_sparc()
3098 (*info->fprintf_func) (stream, "%%csr"); in print_insn_sparc()
3102 (*info->fprintf_func) (stream, "%%fsr"); in print_insn_sparc()
3106 (*info->fprintf_func) (stream, "%%psr"); in print_insn_sparc()
3110 (*info->fprintf_func) (stream, "%%fq"); in print_insn_sparc()
3114 (*info->fprintf_func) (stream, "%%cq"); in print_insn_sparc()
3118 (*info->fprintf_func) (stream, "%%tbr"); in print_insn_sparc()
3122 (*info->fprintf_func) (stream, "%%wim"); in print_insn_sparc()
3126 (*info->fprintf_func) (stream, "%ld", in print_insn_sparc()
3132 (*info->fprintf_func) (stream, "%%y"); in print_insn_sparc()
3142 (*info->fprintf_func) (stream, "%s", name); in print_insn_sparc()
3144 (*info->fprintf_func) (stream, "%%cpreg(%d)", val); in print_insn_sparc()
3164 (*info->read_memory_func) in print_insn_sparc()
3165 (memaddr - 4, buffer, sizeof (buffer), info); in print_insn_sparc()
3184 errcode = (*info->read_memory_func) in print_insn_sparc()
3185 (memaddr - 8, buffer, sizeof (buffer), info); in print_insn_sparc()
3201 (*info->fprintf_func) (stream, "\t! "); in print_insn_sparc()
3202 info->target = in print_insn_sparc()
3206 info->target += X_SIMM (insn, 13); in print_insn_sparc()
3208 info->target |= X_SIMM (insn, 13); in print_insn_sparc()
3209 (*info->print_address_func) (info->target, info); in print_insn_sparc()
3210 info->insn_type = dis_dref; in print_insn_sparc()
3211 info->data_size = 4; /* FIXME!!! */ in print_insn_sparc()
3216 if (opcode->flags & (F_UNBR|F_CONDBR|F_JSR)) in print_insn_sparc()
3218 /* FIXME -- check is_annulled flag. */ in print_insn_sparc()
3219 if (opcode->flags & F_UNBR) in print_insn_sparc()
3220 info->insn_type = dis_branch; in print_insn_sparc()
3221 if (opcode->flags & F_CONDBR) in print_insn_sparc()
3222 info->insn_type = dis_condbranch; in print_insn_sparc()
3223 if (opcode->flags & F_JSR) in print_insn_sparc()
3224 info->insn_type = dis_jsr; in print_insn_sparc()
3225 if (opcode->flags & F_DELAYED) in print_insn_sparc()
3226 info->branch_delay_insns = 1; in print_insn_sparc()
3233 info->insn_type = dis_noninsn; /* Mark as non-valid instruction. */ in print_insn_sparc()
3234 (*info->fprintf_func) (stream, ".long %#08lx", insn); in print_insn_sparc()