Lines Matching refs:OPR
607 #define OPR(oo,ff) OPR_(oo,ff), OPR_MASK macro
736 { "sextl", OPR(0x10,0x00), BASE, ARG_OPRZ1 }, /* pseudo */
738 { "addl", OPR(0x10,0x00), BASE, ARG_OPR },
740 { "s4addl", OPR(0x10,0x02), BASE, ARG_OPR },
742 { "negl", OPR(0x10,0x09), BASE, ARG_OPRZ1 }, /* pseudo */
744 { "subl", OPR(0x10,0x09), BASE, ARG_OPR },
746 { "s4subl", OPR(0x10,0x0B), BASE, ARG_OPR },
748 { "cmpbge", OPR(0x10,0x0F), BASE, ARG_OPR },
750 { "s8addl", OPR(0x10,0x12), BASE, ARG_OPR },
752 { "s8subl", OPR(0x10,0x1B), BASE, ARG_OPR },
754 { "cmpult", OPR(0x10,0x1D), BASE, ARG_OPR },
756 { "addq", OPR(0x10,0x20), BASE, ARG_OPR },
758 { "s4addq", OPR(0x10,0x22), BASE, ARG_OPR },
760 { "negq", OPR(0x10,0x29), BASE, ARG_OPRZ1 }, /* pseudo */
762 { "subq", OPR(0x10,0x29), BASE, ARG_OPR },
764 { "s4subq", OPR(0x10,0x2B), BASE, ARG_OPR },
766 { "cmpeq", OPR(0x10,0x2D), BASE, ARG_OPR },
768 { "s8addq", OPR(0x10,0x32), BASE, ARG_OPR },
770 { "s8subq", OPR(0x10,0x3B), BASE, ARG_OPR },
772 { "cmpule", OPR(0x10,0x3D), BASE, ARG_OPR },
774 { "addl/v", OPR(0x10,0x40), BASE, ARG_OPR },
776 { "negl/v", OPR(0x10,0x49), BASE, ARG_OPRZ1 }, /* pseudo */
778 { "subl/v", OPR(0x10,0x49), BASE, ARG_OPR },
780 { "cmplt", OPR(0x10,0x4D), BASE, ARG_OPR },
782 { "addq/v", OPR(0x10,0x60), BASE, ARG_OPR },
784 { "negq/v", OPR(0x10,0x69), BASE, ARG_OPRZ1 }, /* pseudo */
786 { "subq/v", OPR(0x10,0x69), BASE, ARG_OPR },
788 { "cmple", OPR(0x10,0x6D), BASE, ARG_OPR },
791 { "and", OPR(0x11,0x00), BASE, ARG_OPR },
793 { "andnot", OPR(0x11,0x08), BASE, ARG_OPR }, /* alias */
795 { "bic", OPR(0x11,0x08), BASE, ARG_OPR },
797 { "cmovlbs", OPR(0x11,0x14), BASE, ARG_OPR },
799 { "cmovlbc", OPR(0x11,0x16), BASE, ARG_OPR },
801 { "nop", OPR(0x11,0x20), BASE, { ZA, ZB, ZC } }, /* pseudo */
802 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
803 { "mov", OPR(0x11,0x20), BASE, { ZA, RB, RC } }, /* pseudo */
804 { "mov", OPR(0x11,0x20), BASE, { RA, RBA, RC } }, /* pseudo */
806 { "or", OPR(0x11,0x20), BASE, ARG_OPR }, /* alias */
808 { "bis", OPR(0x11,0x20), BASE, ARG_OPR },
810 { "cmoveq", OPR(0x11,0x24), BASE, ARG_OPR },
812 { "cmovne", OPR(0x11,0x26), BASE, ARG_OPR },
814 { "not", OPR(0x11,0x28), BASE, ARG_OPRZ1 }, /* pseudo */
816 { "ornot", OPR(0x11,0x28), BASE, ARG_OPR },
818 { "xor", OPR(0x11,0x40), BASE, ARG_OPR },
820 { "cmovlt", OPR(0x11,0x44), BASE, ARG_OPR },
822 { "cmovge", OPR(0x11,0x46), BASE, ARG_OPR },
824 { "eqv", OPR(0x11,0x48), BASE, ARG_OPR },
826 { "xornot", OPR(0x11,0x48), BASE, ARG_OPR }, /* alias */
828 { "amask", OPR(0x11,0x61), BASE, ARG_OPRZ1 }, /* ev56 but */
830 { "cmovle", OPR(0x11,0x64), BASE, ARG_OPR },
832 { "cmovgt", OPR(0x11,0x66), BASE, ARG_OPR },
837 { "mskbl", OPR(0x12,0x02), BASE, ARG_OPR },
839 { "extbl", OPR(0x12,0x06), BASE, ARG_OPR },
841 { "insbl", OPR(0x12,0x0B), BASE, ARG_OPR },
843 { "mskwl", OPR(0x12,0x12), BASE, ARG_OPR },
845 { "extwl", OPR(0x12,0x16), BASE, ARG_OPR },
847 { "inswl", OPR(0x12,0x1B), BASE, ARG_OPR },
849 { "mskll", OPR(0x12,0x22), BASE, ARG_OPR },
851 { "extll", OPR(0x12,0x26), BASE, ARG_OPR },
853 { "insll", OPR(0x12,0x2B), BASE, ARG_OPR },
855 { "zap", OPR(0x12,0x30), BASE, ARG_OPR },
857 { "zapnot", OPR(0x12,0x31), BASE, ARG_OPR },
859 { "mskql", OPR(0x12,0x32), BASE, ARG_OPR },
861 { "srl", OPR(0x12,0x34), BASE, ARG_OPR },
863 { "extql", OPR(0x12,0x36), BASE, ARG_OPR },
865 { "sll", OPR(0x12,0x39), BASE, ARG_OPR },
867 { "insql", OPR(0x12,0x3B), BASE, ARG_OPR },
869 { "sra", OPR(0x12,0x3C), BASE, ARG_OPR },
871 { "mskwh", OPR(0x12,0x52), BASE, ARG_OPR },
873 { "inswh", OPR(0x12,0x57), BASE, ARG_OPR },
875 { "extwh", OPR(0x12,0x5A), BASE, ARG_OPR },
877 { "msklh", OPR(0x12,0x62), BASE, ARG_OPR },
879 { "inslh", OPR(0x12,0x67), BASE, ARG_OPR },
881 { "extlh", OPR(0x12,0x6A), BASE, ARG_OPR },
883 { "mskqh", OPR(0x12,0x72), BASE, ARG_OPR },
885 { "insqh", OPR(0x12,0x77), BASE, ARG_OPR },
887 { "extqh", OPR(0x12,0x7A), BASE, ARG_OPR },
890 { "mull", OPR(0x13,0x00), BASE, ARG_OPR },
892 { "mulq", OPR(0x13,0x20), BASE, ARG_OPR },
894 { "umulh", OPR(0x13,0x30), BASE, ARG_OPR },
896 { "mull/v", OPR(0x13,0x40), BASE, ARG_OPR },
898 { "mulq/v", OPR(0x13,0x60), BASE, ARG_OPR },
1292 { "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } },
1295 { "hw_mfpr/i", OPR(0x19,0x01), EV4, ARG_EV4HWMPR },
1296 { "hw_mfpr/a", OPR(0x19,0x02), EV4, ARG_EV4HWMPR },
1297 { "hw_mfpr/ai", OPR(0x19,0x03), EV4, ARG_EV4HWMPR },
1298 { "hw_mfpr/p", OPR(0x19,0x04), EV4, ARG_EV4HWMPR },
1299 { "hw_mfpr/pi", OPR(0x19,0x05), EV4, ARG_EV4HWMPR },
1300 { "hw_mfpr/pa", OPR(0x19,0x06), EV4, ARG_EV4HWMPR },
1301 { "hw_mfpr/pai", OPR(0x19,0x07), EV4, ARG_EV4HWMPR },
1522 { "sextb", OPR(0x1C, 0x00), BWX, ARG_OPRZ1 },
1523 { "sextw", OPR(0x1C, 0x01), BWX, ARG_OPRZ1 },
1524 { "ctpop", OPR(0x1C, 0x30), CIX, ARG_OPRZ1 },
1525 { "perr", OPR(0x1C, 0x31), MAX, ARG_OPR },
1526 { "ctlz", OPR(0x1C, 0x32), CIX, ARG_OPRZ1 },
1527 { "cttz", OPR(0x1C, 0x33), CIX, ARG_OPRZ1 },
1528 { "unpkbw", OPR(0x1C, 0x34), MAX, ARG_OPRZ1 },
1529 { "unpkbl", OPR(0x1C, 0x35), MAX, ARG_OPRZ1 },
1530 { "pkwb", OPR(0x1C, 0x36), MAX, ARG_OPRZ1 },
1531 { "pklb", OPR(0x1C, 0x37), MAX, ARG_OPRZ1 },
1532 { "minsb8", OPR(0x1C, 0x38), MAX, ARG_OPR },
1534 { "minsw4", OPR(0x1C, 0x39), MAX, ARG_OPR },
1536 { "minub8", OPR(0x1C, 0x3A), MAX, ARG_OPR },
1538 { "minuw4", OPR(0x1C, 0x3B), MAX, ARG_OPR },
1540 { "maxub8", OPR(0x1C, 0x3C), MAX, ARG_OPR },
1542 { "maxuw4", OPR(0x1C, 0x3D), MAX, ARG_OPR },
1544 { "maxsb8", OPR(0x1C, 0x3E), MAX, ARG_OPR },
1546 { "maxsw4", OPR(0x1C, 0x3F), MAX, ARG_OPR },
1551 { "hw_mtpr", OPR(0x1D,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } },
1554 { "hw_mtpr/i", OPR(0x1D,0x01), EV4, ARG_EV4HWMPR },
1555 { "hw_mtpr/a", OPR(0x1D,0x02), EV4, ARG_EV4HWMPR },
1556 { "hw_mtpr/ai", OPR(0x1D,0x03), EV4, ARG_EV4HWMPR },
1557 { "hw_mtpr/p", OPR(0x1D,0x04), EV4, ARG_EV4HWMPR },
1558 { "hw_mtpr/pi", OPR(0x1D,0x05), EV4, ARG_EV4HWMPR },
1559 { "hw_mtpr/pa", OPR(0x1D,0x06), EV4, ARG_EV4HWMPR },
1560 { "hw_mtpr/pai", OPR(0x1D,0x07), EV4, ARG_EV4HWMPR },