Lines Matching refs:cmd

39                          struct virtio_gpu_ctrl_command *cmd)  in virgl_cmd_context_create()  argument
51 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_context_destroy() argument
62 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_create_resource_2d() argument
85 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_create_resource_3d() argument
108 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_resource_unref() argument
132 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_get_capset_info() argument
155 vg_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); in virgl_cmd_get_capset_info()
171 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_get_capset() argument
182 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; in virgl_cmd_get_capset()
191 vg_ctrl_response(g, cmd, &resp->hdr, sizeof(*resp) + max_size); in virgl_cmd_get_capset()
197 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_submit_3d() argument
206 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, in virgl_cmd_submit_3d()
210 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; in virgl_cmd_submit_3d()
222 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_transfer_to_host_2d() argument
247 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_transfer_to_host_3d() argument
264 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_transfer_from_host_3d() argument
281 struct virtio_gpu_ctrl_command *cmd) in virgl_resource_attach_backing() argument
289 ret = vg_create_mapping_iov(g, &att_rb, cmd, &res_iovs); in virgl_resource_attach_backing()
291 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; in virgl_resource_attach_backing()
304 struct virtio_gpu_ctrl_command *cmd) in virgl_resource_detach_backing() argument
354 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_set_scanout() argument
365 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID; in virgl_cmd_set_scanout()
378 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; in virgl_cmd_set_scanout()
385 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; in virgl_cmd_set_scanout()
431 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_resource_flush() argument
463 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_ctx_attach_resource() argument
474 struct virtio_gpu_ctrl_command *cmd) in virgl_cmd_ctx_detach_resource() argument
483 void vg_virgl_process_cmd(VuGpu *g, struct virtio_gpu_ctrl_command *cmd) in vg_virgl_process_cmd() argument
486 switch (cmd->cmd_hdr.type) { in vg_virgl_process_cmd()
488 virgl_cmd_context_create(g, cmd); in vg_virgl_process_cmd()
491 virgl_cmd_context_destroy(g, cmd); in vg_virgl_process_cmd()
494 virgl_cmd_create_resource_2d(g, cmd); in vg_virgl_process_cmd()
497 virgl_cmd_create_resource_3d(g, cmd); in vg_virgl_process_cmd()
500 virgl_cmd_submit_3d(g, cmd); in vg_virgl_process_cmd()
503 virgl_cmd_transfer_to_host_2d(g, cmd); in vg_virgl_process_cmd()
506 virgl_cmd_transfer_to_host_3d(g, cmd); in vg_virgl_process_cmd()
509 virgl_cmd_transfer_from_host_3d(g, cmd); in vg_virgl_process_cmd()
512 virgl_resource_attach_backing(g, cmd); in vg_virgl_process_cmd()
515 virgl_resource_detach_backing(g, cmd); in vg_virgl_process_cmd()
518 virgl_cmd_set_scanout(g, cmd); in vg_virgl_process_cmd()
521 virgl_cmd_resource_flush(g, cmd); in vg_virgl_process_cmd()
524 virgl_cmd_resource_unref(g, cmd); in vg_virgl_process_cmd()
528 virgl_cmd_ctx_attach_resource(g, cmd); in vg_virgl_process_cmd()
532 virgl_cmd_ctx_detach_resource(g, cmd); in vg_virgl_process_cmd()
535 virgl_cmd_get_capset_info(g, cmd); in vg_virgl_process_cmd()
538 virgl_cmd_get_capset(g, cmd); in vg_virgl_process_cmd()
541 vg_get_display_info(g, cmd); in vg_virgl_process_cmd()
544 vg_get_edid(g, cmd); in vg_virgl_process_cmd()
547 g_debug("TODO handle ctrl %x\n", cmd->cmd_hdr.type); in vg_virgl_process_cmd()
548 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; in vg_virgl_process_cmd()
552 if (cmd->state != VG_CMD_STATE_NEW) { in vg_virgl_process_cmd()
556 if (cmd->error) { in vg_virgl_process_cmd()
558 cmd->cmd_hdr.type, cmd->error); in vg_virgl_process_cmd()
559 vg_ctrl_response_nodata(g, cmd, cmd->error); in vg_virgl_process_cmd()
563 if (!(cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE)) { in vg_virgl_process_cmd()
564 vg_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); in vg_virgl_process_cmd()
569 cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); in vg_virgl_process_cmd()
570 virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); in vg_virgl_process_cmd()
577 struct virtio_gpu_ctrl_command *cmd, *tmp; in virgl_write_fence() local
579 QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { in virgl_write_fence()
584 if (cmd->cmd_hdr.fence_id > fence) { in virgl_write_fence()
587 g_debug("FENCE %" PRIu64, cmd->cmd_hdr.fence_id); in virgl_write_fence()
588 vg_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); in virgl_write_fence()
589 QTAILQ_REMOVE(&g->fenceq, cmd, next); in virgl_write_fence()
590 free(cmd); in virgl_write_fence()