Lines Matching refs:idxmap

417 void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap)  in tlb_flush_by_mmuidx()  argument
419 tlb_debug("mmu_idx: 0x%" PRIx16 "\n", idxmap); in tlb_flush_by_mmuidx()
423 tlb_flush_by_mmuidx_async_work(cpu, RUN_ON_CPU_HOST_INT(idxmap)); in tlb_flush_by_mmuidx()
431 void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *src_cpu, uint16_t idxmap) in tlb_flush_by_mmuidx_all_cpus_synced() argument
435 tlb_debug("mmu_idx: 0x%"PRIx16"\n", idxmap); in tlb_flush_by_mmuidx_all_cpus_synced()
437 flush_all_helper(src_cpu, fn, RUN_ON_CPU_HOST_INT(idxmap)); in tlb_flush_by_mmuidx_all_cpus_synced()
438 async_safe_run_on_cpu(src_cpu, fn, RUN_ON_CPU_HOST_INT(idxmap)); in tlb_flush_by_mmuidx_all_cpus_synced()
540 uint16_t idxmap) in tlb_flush_page_by_mmuidx_async_0() argument
546 tlb_debug("page addr: %016" VADDR_PRIx " mmu_map:0x%x\n", addr, idxmap); in tlb_flush_page_by_mmuidx_async_0()
550 if ((idxmap >> mmu_idx) & 1) { in tlb_flush_page_by_mmuidx_async_0()
579 uint16_t idxmap = addr_and_idxmap & ~TARGET_PAGE_MASK; in tlb_flush_page_by_mmuidx_async_1() local
581 tlb_flush_page_by_mmuidx_async_0(cpu, addr, idxmap); in tlb_flush_page_by_mmuidx_async_1()
586 uint16_t idxmap; member
604 tlb_flush_page_by_mmuidx_async_0(cpu, d->addr, d->idxmap); in tlb_flush_page_by_mmuidx_async_2()
608 void tlb_flush_page_by_mmuidx(CPUState *cpu, vaddr addr, uint16_t idxmap) in tlb_flush_page_by_mmuidx() argument
610 tlb_debug("addr: %016" VADDR_PRIx " mmu_idx:%" PRIx16 "\n", addr, idxmap); in tlb_flush_page_by_mmuidx()
617 tlb_flush_page_by_mmuidx_async_0(cpu, addr, idxmap); in tlb_flush_page_by_mmuidx()
627 uint16_t idxmap) in tlb_flush_page_by_mmuidx_all_cpus_synced() argument
629 tlb_debug("addr: %016" VADDR_PRIx " mmu_idx:%"PRIx16"\n", addr, idxmap); in tlb_flush_page_by_mmuidx_all_cpus_synced()
638 if (idxmap < TARGET_PAGE_SIZE) { in tlb_flush_page_by_mmuidx_all_cpus_synced()
640 RUN_ON_CPU_TARGET_PTR(addr | idxmap)); in tlb_flush_page_by_mmuidx_all_cpus_synced()
642 RUN_ON_CPU_TARGET_PTR(addr | idxmap)); in tlb_flush_page_by_mmuidx_all_cpus_synced()
652 d->idxmap = idxmap; in tlb_flush_page_by_mmuidx_all_cpus_synced()
660 d->idxmap = idxmap; in tlb_flush_page_by_mmuidx_all_cpus_synced()
724 uint16_t idxmap; member
736 d.addr, d.bits, d.len, d.idxmap); in tlb_flush_range_by_mmuidx_async_0()
740 if ((d.idxmap >> mmu_idx) & 1) { in tlb_flush_range_by_mmuidx_async_0()
775 vaddr len, uint16_t idxmap, in tlb_flush_range_by_mmuidx() argument
787 tlb_flush_page_by_mmuidx(cpu, addr, idxmap); in tlb_flush_range_by_mmuidx()
792 tlb_flush_by_mmuidx(cpu, idxmap); in tlb_flush_range_by_mmuidx()
799 d.idxmap = idxmap; in tlb_flush_range_by_mmuidx()
806 uint16_t idxmap, unsigned bits) in tlb_flush_page_bits_by_mmuidx() argument
808 tlb_flush_range_by_mmuidx(cpu, addr, TARGET_PAGE_SIZE, idxmap, bits); in tlb_flush_page_bits_by_mmuidx()
814 uint16_t idxmap, in tlb_flush_range_by_mmuidx_all_cpus_synced() argument
825 tlb_flush_page_by_mmuidx_all_cpus_synced(src_cpu, addr, idxmap); in tlb_flush_range_by_mmuidx_all_cpus_synced()
830 tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap); in tlb_flush_range_by_mmuidx_all_cpus_synced()
837 d.idxmap = idxmap; in tlb_flush_range_by_mmuidx_all_cpus_synced()
856 uint16_t idxmap, in tlb_flush_page_bits_by_mmuidx_all_cpus_synced() argument
860 idxmap, bits); in tlb_flush_page_bits_by_mmuidx_all_cpus_synced()