Lines Matching refs:power
3 This directory contains the source code for applications performing system power
4 on and off control, and power sequencer device configuration and monitoring.
10 Implements GPIO control of power on / off and monitoring of the chassis power
12 `power-chassis-control` and `power-chassis-good` respectively. The chassis pgood
13 is monitored on a three second poll. Enforces a minimum power off time of 15
14 seconds from cold start and 25 seconds from power off.
19 Determines the type and I2C information of the power sequencer device with the
29 The `state` property is set to initiate a power on or power off sequence. The
30 power good `pgood` property reflects the power state of the chassis. At power on
31 time the `pgood` will lag the `state` as the power sequencer performs its
32 processing. The same lag will occur on a requested power off. Loss of `pgood`
37 Implements a generic power sequencer device monitoring interface. Used when the
45 Defines a base class for monitoring the UCD90\* family of power sequencer
53 Implements a specific UCD90320 power sequencer device monitoring class.
57 Implements a specific UCD90160 power sequencer device monitoring class.