Lines Matching +full:0 +full:x210000
23 #define GICR_TYPER 0x8
57 TEST_ASSERT(val == want, "%s; want '0x%x', got '0x%x'", msg, want, val); in v3_redist_reg_get()
63 GUEST_SYNC(0); in guest_code()
72 return __vcpu_run(vcpu) ? -errno : 0; in run_vcpu()
114 .size = 0x10000,
115 .alignment = 0x10000,
120 .size = NR_VCPUS * 0x20000,
121 .alignment = 0x10000,
126 .size = 0x1000,
127 .alignment = 0x1000,
132 .size = 0x2000,
133 .alignment = 0x1000,
140 * used hence the overlap. In the case of GICv3, A RDIST region is set at @0x0
141 * and a DIST region is set @0x70000. The GICv2 case sets a CPUIF @0x0 and a
142 * DIST region @0x1000.
166 addr = dist.alignment / 0x10; in subtest_dist_rdist()
171 addr = rdist.alignment / 0x10; in subtest_dist_rdist()
193 /* set REDIST base address @0x0*/ in subtest_dist_rdist()
194 addr = 0x00000; in subtest_dist_rdist()
199 addr = 0xE0000; in subtest_dist_rdist()
208 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 0, 0); in subtest_dist_rdist()
234 addr = REDIST_REGION_ATTR_ADDR(NR_VCPUS, 0x100000, 2, 0); in subtest_v3_redist_regions()
237 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with flags != 0"); in subtest_v3_redist_regions()
239 addr = REDIST_REGION_ATTR_ADDR(0, 0x100000, 0, 0); in subtest_v3_redist_regions()
242 TEST_ASSERT(ret && errno == EINVAL, "redist region attr value with count== 0"); in subtest_v3_redist_regions()
244 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1); in subtest_v3_redist_regions()
248 "attempt to register the first rdist region with index != 0"); in subtest_v3_redist_regions()
250 addr = REDIST_REGION_ATTR_ADDR(2, 0x201000, 0, 1); in subtest_v3_redist_regions()
255 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in subtest_v3_redist_regions()
259 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 1); in subtest_v3_redist_regions()
264 addr = REDIST_REGION_ATTR_ADDR(1, 0x210000, 0, 2); in subtest_v3_redist_regions()
270 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 2); in subtest_v3_redist_regions()
275 addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1); in subtest_v3_redist_regions()
279 addr = REDIST_REGION_ATTR_ADDR(1, max_phys_size, 0, 2); in subtest_v3_redist_regions()
286 addr = REDIST_REGION_ATTR_ADDR(2, max_phys_size - 0x30000, 0, 2); in subtest_v3_redist_regions()
292 addr = 0x260000; in subtest_v3_redist_regions()
300 * region 0 @ 0x200000 2 redists in subtest_v3_redist_regions()
301 * region 1 @ 0x240000 1 redist in subtest_v3_redist_regions()
305 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 0); in subtest_v3_redist_regions()
306 expected_addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in subtest_v3_redist_regions()
309 TEST_ASSERT(!ret && addr == expected_addr, "read characteristics of region #0"); in subtest_v3_redist_regions()
311 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 1); in subtest_v3_redist_regions()
312 expected_addr = REDIST_REGION_ATTR_ADDR(1, 0x240000, 0, 1); in subtest_v3_redist_regions()
317 addr = REDIST_REGION_ATTR_ADDR(0, 0, 0, 2); in subtest_v3_redist_regions()
322 addr = 0x260000; in subtest_v3_redist_regions()
326 addr = REDIST_REGION_ATTR_ADDR(1, 0x260000, 0, 2); in subtest_v3_redist_regions()
377 #define GIC_CPU_CTRL 0x00
382 u64 val = 0; in test_v2_uaccess_cpuif_no_vcpus()
389 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0)); in test_v2_uaccess_cpuif_no_vcpus()
394 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val); in test_v2_uaccess_cpuif_no_vcpus()
399 KVM_VGIC_V2_ATTR(GIC_CPU_CTRL, 0), &val); in test_v2_uaccess_cpuif_no_vcpus()
429 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2); in test_v3_new_redist_regions()
448 addr = REDIST_REGION_ATTR_ADDR(1, 0x280000, 0, 2); in test_v3_new_redist_regions()
468 (void)vm_vcpu_add(v.vm, 0, guest_code); in test_v3_typer_accesses()
487 for (i = 0; i < NR_VCPUS ; i++) { in test_v3_typer_accesses()
488 v3_redist_reg_get(v.gic_fd, i, GICR_TYPER, i * 0x100, in test_v3_typer_accesses()
492 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 0); in test_v3_typer_accesses()
496 /* The 2 first rdists should be put there (vcpu 0 and 3) */ in test_v3_typer_accesses()
497 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x0, "read typer of rdist #0"); in test_v3_typer_accesses()
498 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #1"); in test_v3_typer_accesses()
500 addr = REDIST_REGION_ATTR_ADDR(10, 0x100000, 0, 1); in test_v3_typer_accesses()
505 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, in test_v3_typer_accesses()
507 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200, in test_v3_typer_accesses()
510 addr = REDIST_REGION_ATTR_ADDR(10, 0x20000, 0, 1); in test_v3_typer_accesses()
514 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1"); in test_v3_typer_accesses()
515 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210, in test_v3_typer_accesses()
528 for (i = 0; i < nr_vcpus; i++) in vm_gic_v3_create_with_vcpuids()
539 * rdist region #0 @0x100000 2 rdist capacity
540 * rdists: 0, 3 (Last)
541 * rdist region #1 @0x240000 2 rdist capacity
543 * rdist region #2 @0x200000 2 rdist capacity
548 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; in test_v3_last_bit_redist_regions()
557 addr = REDIST_REGION_ATTR_ADDR(2, 0x100000, 0, 0); in test_v3_last_bit_redist_regions()
561 addr = REDIST_REGION_ATTR_ADDR(2, 0x240000, 0, 1); in test_v3_last_bit_redist_regions()
565 addr = REDIST_REGION_ATTR_ADDR(2, 0x200000, 0, 2); in test_v3_last_bit_redist_regions()
569 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0"); in test_v3_last_bit_redist_regions()
570 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #1"); in test_v3_last_bit_redist_regions()
571 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x200, "read typer of rdist #2"); in test_v3_last_bit_redist_regions()
572 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x310, "read typer of rdist #3"); in test_v3_last_bit_redist_regions()
573 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #5"); in test_v3_last_bit_redist_regions()
574 v3_redist_reg_get(v.gic_fd, 4, GICR_TYPER, 0x410, "read typer of rdist #4"); in test_v3_last_bit_redist_regions()
582 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; in test_v3_last_bit_single_rdist()
591 addr = 0x10000; in test_v3_last_bit_single_rdist()
595 v3_redist_reg_get(v.gic_fd, 0, GICR_TYPER, 0x000, "read typer of rdist #0"); in test_v3_last_bit_single_rdist()
596 v3_redist_reg_get(v.gic_fd, 3, GICR_TYPER, 0x300, "read typer of rdist #1"); in test_v3_last_bit_single_rdist()
597 v3_redist_reg_get(v.gic_fd, 5, GICR_TYPER, 0x500, "read typer of rdist #2"); in test_v3_last_bit_single_rdist()
598 v3_redist_reg_get(v.gic_fd, 1, GICR_TYPER, 0x100, "read typer of rdist #3"); in test_v3_last_bit_single_rdist()
599 v3_redist_reg_get(v.gic_fd, 2, GICR_TYPER, 0x210, "read typer of rdist #3"); in test_v3_last_bit_single_rdist()
615 addr = max_phys_size - (3 * 2 * 0x10000); in test_v3_redist_ipa_range_check_at_vcpu_run()
619 addr = 0x00000; in test_v3_redist_ipa_range_check_at_vcpu_run()
648 addr = 0x401000; in test_v3_its_region()
660 addr = max_phys_size - 0x10000; in test_v3_its_region()
667 addr = 0x400000; in test_v3_its_region()
671 addr = 0x300000; in test_v3_its_region()
681 * Returns 0 if it's possible to create GIC device of a given type (V2 or V3).
693 ret = __kvm_test_create_device(v.vm, 0); in test_kvm_device()
703 TEST_ASSERT(ret < 0 && errno == EEXIST, "create GIC device twice"); in test_kvm_device()
711 TEST_ASSERT(ret < 0 && (errno == EINVAL || errno == EEXIST), in test_kvm_device()
717 return 0; in test_kvm_device()
742 int cnt_impl = 0; in main()
765 return 0; in main()