Lines Matching full:w1
113 w1 = 2; \ in sdiv32_non_zero_reg_1()
114 w0 s/= w1; \ in sdiv32_non_zero_reg_1()
126 w1 = -2; \ in sdiv32_non_zero_reg_2()
127 w0 s/= w1; \ in sdiv32_non_zero_reg_2()
139 w1 = -2; \ in sdiv32_non_zero_reg_3()
140 w0 s/= w1; \ in sdiv32_non_zero_reg_3()
152 w1 = 2; \ in sdiv32_non_zero_reg_4()
153 w0 s/= w1; \ in sdiv32_non_zero_reg_4()
165 w1 = -2; \ in sdiv32_non_zero_reg_5()
166 w0 s/= w1; \ in sdiv32_non_zero_reg_5()
178 w1 = -2; \ in sdiv32_non_zero_reg_6()
179 w0 s/= w1; \ in sdiv32_non_zero_reg_6()
191 w1 = 2; \ in sdiv32_non_zero_reg_7()
192 w0 s/= w1; \ in sdiv32_non_zero_reg_7()
204 w1 = 2; \ in sdiv32_non_zero_reg_8()
205 w0 s/= w1; \ in sdiv32_non_zero_reg_8()
439 w1 = 2; \ in smod32_non_zero_reg_1()
440 w0 s%%= w1; \ in smod32_non_zero_reg_1()
452 w1 = -2; \ in smod32_non_zero_reg_2()
453 w0 s%%= w1; \ in smod32_non_zero_reg_2()
465 w1 = -2; \ in smod32_non_zero_reg_3()
466 w0 s%%= w1; \ in smod32_non_zero_reg_3()
478 w1 = 2; \ in smod32_non_zero_reg_4()
479 w0 s%%= w1; \ in smod32_non_zero_reg_4()
491 w1 = -2; \ in smod32_non_zero_reg_5()
492 w0 s%%= w1; \ in smod32_non_zero_reg_5()
504 w1 = -2; \ in smod32_non_zero_reg_6()
505 w0 s%%= w1; \ in smod32_non_zero_reg_6()
717 w1 = 0; \ in sdiv32_zero_divisor()
719 w2 s/= w1; \ in sdiv32_zero_divisor()
747 w1 = 0; \ in smod32_zero_divisor()
749 w2 s%%= w1; \ in smod32_zero_divisor()