bpf/progs/verifier_sdiv.c

1 // SPDX-License-Identifier: GPL-2.0
11 __description("SDIV32, non-zero imm divisor, check 1")
12 __success __success_unpriv __retval(-20)
16 	w0 = -41;					\  in sdiv32_non_zero_imm_1()
23 __description("SDIV32, non-zero imm divisor, check 2")
24 __success __success_unpriv __retval(-20)
29 	w0 s/= -2;					\  in sdiv32_non_zero_imm_2()
35 __description("SDIV32, non-zero imm divisor, check 3")
40 	w0 = -41;					\  in sdiv32_non_zero_imm_3()
41 	w0 s/= -2;					\  in sdiv32_non_zero_imm_3()
47 __description("SDIV32, non-zero imm divisor, check 4")
48 __success __success_unpriv __retval(-21)
52 	w0 = -42;					\  in sdiv32_non_zero_imm_4()
59 __description("SDIV32, non-zero imm divisor, check 5")
60 __success __success_unpriv __retval(-21)
65 	w0 s/= -2;					\  in sdiv32_non_zero_imm_5()
71 __description("SDIV32, non-zero imm divisor, check 6")
76 	w0 = -42;					\  in sdiv32_non_zero_imm_6()
77 	w0 s/= -2;					\  in sdiv32_non_zero_imm_6()
83 __description("SDIV32, non-zero imm divisor, check 7")
95 __description("SDIV32, non-zero imm divisor, check 8")
107 __description("SDIV32, non-zero reg divisor, check 1")
108 __success __success_unpriv __retval(-20)
112 	w0 = -41;					\  in sdiv32_non_zero_reg_1()
120 __description("SDIV32, non-zero reg divisor, check 2")
121 __success __success_unpriv __retval(-20)
126 	w1 = -2;					\  in sdiv32_non_zero_reg_2()
133 __description("SDIV32, non-zero reg divisor, check 3")
138 	w0 = -41;					\  in sdiv32_non_zero_reg_3()
139 	w1 = -2;					\  in sdiv32_non_zero_reg_3()
146 __description("SDIV32, non-zero reg divisor, check 4")
147 __success __success_unpriv __retval(-21)
151 	w0 = -42;					\  in sdiv32_non_zero_reg_4()
159 __description("SDIV32, non-zero reg divisor, check 5")
160 __success __success_unpriv __retval(-21)
165 	w1 = -2;					\  in sdiv32_non_zero_reg_5()
172 __description("SDIV32, non-zero reg divisor, check 6")
177 	w0 = -42;					\  in sdiv32_non_zero_reg_6()
178 	w1 = -2;					\  in sdiv32_non_zero_reg_6()
185 __description("SDIV32, non-zero reg divisor, check 7")
198 __description("SDIV32, non-zero reg divisor, check 8")
211 __description("SDIV64, non-zero imm divisor, check 1")
212 __success __success_unpriv __retval(-20)
216 	r0 = -41;					\  in sdiv64_non_zero_imm_1()
223 __description("SDIV64, non-zero imm divisor, check 2")
224 __success __success_unpriv __retval(-20)
229 	r0 s/= -2;					\  in sdiv64_non_zero_imm_2()
235 __description("SDIV64, non-zero imm divisor, check 3")
240 	r0 = -41;					\  in sdiv64_non_zero_imm_3()
241 	r0 s/= -2;					\  in sdiv64_non_zero_imm_3()
247 __description("SDIV64, non-zero imm divisor, check 4")
248 __success __success_unpriv __retval(-21)
252 	r0 = -42;					\  in sdiv64_non_zero_imm_4()
259 __description("SDIV64, non-zero imm divisor, check 5")
260 __success __success_unpriv __retval(-21)
265 	r0 s/= -2;					\  in sdiv64_non_zero_imm_5()
271 __description("SDIV64, non-zero imm divisor, check 6")
276 	r0 = -42;					\  in sdiv64_non_zero_imm_6()
277 	r0 s/= -2;					\  in sdiv64_non_zero_imm_6()
283 __description("SDIV64, non-zero reg divisor, check 1")
284 __success __success_unpriv __retval(-20)
288 	r0 = -41;					\  in sdiv64_non_zero_reg_1()
296 __description("SDIV64, non-zero reg divisor, check 2")
297 __success __success_unpriv __retval(-20)
302 	r1 = -2;					\  in sdiv64_non_zero_reg_2()
309 __description("SDIV64, non-zero reg divisor, check 3")
314 	r0 = -41;					\  in sdiv64_non_zero_reg_3()
315 	r1 = -2;					\  in sdiv64_non_zero_reg_3()
322 __description("SDIV64, non-zero reg divisor, check 4")
323 __success __success_unpriv __retval(-21)
327 	r0 = -42;					\  in sdiv64_non_zero_reg_4()
335 __description("SDIV64, non-zero reg divisor, check 5")
336 __success __success_unpriv __retval(-21)
341 	r1 = -2;					\  in sdiv64_non_zero_reg_5()
348 __description("SDIV64, non-zero reg divisor, check 6")
353 	r0 = -42;					\  in sdiv64_non_zero_reg_6()
354 	r1 = -2;					\  in sdiv64_non_zero_reg_6()
361 __description("SMOD32, non-zero imm divisor, check 1")
362 __success __success_unpriv __retval(-1)
366 	w0 = -41;					\  in smod32_non_zero_imm_1()
373 __description("SMOD32, non-zero imm divisor, check 2")
379 	w0 s%%= -2;					\  in smod32_non_zero_imm_2()
385 __description("SMOD32, non-zero imm divisor, check 3")
386 __success __success_unpriv __retval(-1)
390 	w0 = -41;					\  in smod32_non_zero_imm_3()
391 	w0 s%%= -2;					\  in smod32_non_zero_imm_3()
397 __description("SMOD32, non-zero imm divisor, check 4")
402 	w0 = -42;					\  in smod32_non_zero_imm_4()
409 __description("SMOD32, non-zero imm divisor, check 5")
415 	w0 s%%= -2;					\  in smod32_non_zero_imm_5()
421 __description("SMOD32, non-zero imm divisor, check 6")
426 	w0 = -42;					\  in smod32_non_zero_imm_6()
427 	w0 s%%= -2;					\  in smod32_non_zero_imm_6()
433 __description("SMOD32, non-zero reg divisor, check 1")
434 __success __success_unpriv __retval(-1)
438 	w0 = -41;					\  in smod32_non_zero_reg_1()
446 __description("SMOD32, non-zero reg divisor, check 2")
452 	w1 = -2;					\  in smod32_non_zero_reg_2()
459 __description("SMOD32, non-zero reg divisor, check 3")
460 __success __success_unpriv __retval(-1)
464 	w0 = -41;					\  in smod32_non_zero_reg_3()
465 	w1 = -2;					\  in smod32_non_zero_reg_3()
472 __description("SMOD32, non-zero reg divisor, check 4")
477 	w0 = -42;					\  in smod32_non_zero_reg_4()
485 __description("SMOD32, non-zero reg divisor, check 5")
491 	w1 = -2;					\  in smod32_non_zero_reg_5()
498 __description("SMOD32, non-zero reg divisor, check 6")
503 	w0 = -42;					\  in smod32_non_zero_reg_6()
504 	w1 = -2;					\  in smod32_non_zero_reg_6()
511 __description("SMOD64, non-zero imm divisor, check 1")
512 __success __success_unpriv __retval(-1)
516 	r0 = -41;					\  in smod64_non_zero_imm_1()
523 __description("SMOD64, non-zero imm divisor, check 2")
529 	r0 s%%= -2;					\  in smod64_non_zero_imm_2()
535 __description("SMOD64, non-zero imm divisor, check 3")
536 __success __success_unpriv __retval(-1)
540 	r0 = -41;					\  in smod64_non_zero_imm_3()
541 	r0 s%%= -2;					\  in smod64_non_zero_imm_3()
547 __description("SMOD64, non-zero imm divisor, check 4")
552 	r0 = -42;					\  in smod64_non_zero_imm_4()
559 __description("SMOD64, non-zero imm divisor, check 5")
560 __success __success_unpriv __retval(-0)
565 	r0 s%%= -2;					\  in smod64_non_zero_imm_5()
571 __description("SMOD64, non-zero imm divisor, check 6")
576 	r0 = -42;					\  in smod64_non_zero_imm_6()
577 	r0 s%%= -2;					\  in smod64_non_zero_imm_6()
583 __description("SMOD64, non-zero imm divisor, check 7")
595 __description("SMOD64, non-zero imm divisor, check 8")
607 __description("SMOD64, non-zero reg divisor, check 1")
608 __success __success_unpriv __retval(-1)
612 	r0 = -41;					\  in smod64_non_zero_reg_1()
620 __description("SMOD64, non-zero reg divisor, check 2")
626 	r1 = -2;					\  in smod64_non_zero_reg_2()
633 __description("SMOD64, non-zero reg divisor, check 3")
634 __success __success_unpriv __retval(-1)
638 	r0 = -41;					\  in smod64_non_zero_reg_3()
639 	r1 = -2;					\  in smod64_non_zero_reg_3()
646 __description("SMOD64, non-zero reg divisor, check 4")
651 	r0 = -42;					\  in smod64_non_zero_reg_4()
659 __description("SMOD64, non-zero reg divisor, check 5")
665 	r1 = -2;					\  in smod64_non_zero_reg_5()
672 __description("SMOD64, non-zero reg divisor, check 6")
677 	r0 = -42;					\  in smod64_non_zero_reg_6()
678 	r1 = -2;					\  in smod64_non_zero_reg_6()
685 __description("SMOD64, non-zero reg divisor, check 7")
698 __description("SMOD64, non-zero reg divisor, check 8")
711 __description("SDIV32, zero divisor")
718 	w2 = -1;					\  in sdiv32_zero_divisor()
726 __description("SDIV64, zero divisor")
733 	r2 = -1;					\  in sdiv64_zero_divisor()
741 __description("SMOD32, zero divisor")
742 __success __success_unpriv __retval(-1)
748 	w2 = -1;					\  in smod32_zero_divisor()
756 __description("SMOD64, zero divisor")
757 __success __success_unpriv __retval(-1)
763 	r2 = -1;					\  in smod64_zero_divisor()