Lines Matching +full:up +full:- +full:counter

21counter. This event can approximate elapsed time while the core was not in a halt state. It is cou…
29counter. This event can approximate elapsed time while the core was not in a halt state. It is cou…
36 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eigh…
48 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
51- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
56 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
60- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
72 … the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end r…
75-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution…
80 …"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - archit…
82-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TM…
87 …ption": "TMA slots available for an unhalted logical processor. General counter - architectural ev…
90-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
95 …orrelates with higher performance for example, as measured by the instructions-per-cycle metric.",
98 …e instructions-per-cycle metric.\nSoftware can use this event as the numerator for the Retiring me…