Lines Matching +full:max +full:- +full:counts

7         "PublicDescription": "Counts all branch instructions retired.",
15 …"PublicDescription": "Counts all the retired branch instructions that were mispredicted by the pro…
21Counts the number of reference cycles when the core is not in a halt state. The core enters the ha…
29Counts the number of reference cycles when the core is not in a halt state. The core enters the ha…
36 …"PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. Th…
44 …"PublicDescription": "This is an architectural event that counts the number of thread cycles while…
48 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
51 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
56 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
60 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
67 …"PublicDescription": "Counts the number of times where store forwarding was prevented for a load o…
72 …iption": "This event counts a subset of the Topdown Slots event that were not consumed by the back
75counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to …
80 …"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - archit…
82-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TM…
87 …n": "TMA slots available for an unhalted logical processor. General counter - architectural event",
90Counts the number of available slots for an unhalted logical processor. The event increments by ma…
95counts a subset of the Topdown Slots event that are utilized by operations that eventually get ret…
98counts a subset of the Topdown Slots event that are utilized by operations that eventually get ret…