Lines Matching full:per
21 "BriefDescription": "% of Branch miss predictions per instruction",
27 "BriefDescription": "Count cache branch misprediction per instruction",
39 "BriefDescription": "CR MisPredictions per Instruction",
57 "BriefDescription": "TA MisPredictions per Instruction",
390 "BriefDescription": "Run cycles per run instruction",
456 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Modified) per Inst",
462 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Shared) per Inst",
468 "BriefDescription": "% of DL1 Reloads from Distant L4 per Inst",
474 "BriefDescription": "% of DL1 Reloads from Distant Memory per Inst",
480 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
486 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
492 …"BriefDescription": "Percentage of L2 load hits per instruction where the L2 experienced a Load-Hi…
498 "BriefDescription": "% of DL1 reloads from L2 per Inst",
504 …"BriefDescription": "Percentage of L2 load hits per instruction where the L2 did not experience a …
510 …"BriefDescription": "Percentage of L2 load hits per instruction where the L2 experienced some conf…
516 "BriefDescription": "% of DL1 reloads from L2 per Inst",
522 "BriefDescription": "% of DL1 reloads from Private L3 M state, other core per Inst",
528 "BriefDescription": "% of DL1 reloads from Private L3 S tate, other core per Inst",
534 …"BriefDescription": "Percentage of L3 load hits per instruction where the load collided with a pen…
540 "BriefDescription": "% of DL1 reloads from L3 per Inst",
546 …"BriefDescription": "Percentage of L3 load hits per instruction where the L3 did not experience a …
552 "BriefDescription": "% of DL1 Reloads from L3 per Inst",
558 "BriefDescription": "% of DL1 Reloads from Local L4 per Inst",
564 "BriefDescription": "% of DL1 Reloads from Local Memory per Inst",
570 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
576 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
582 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
588 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
594 "BriefDescription": "Percentage of L1 demand load misses per run instruction",
684 …"BriefDescription": "Percentage of L3 load hits per instruction where the line was brought into th…
840 "BriefDescription": "Branch Mispredict flushes per instruction",
846 "BriefDescription": "Cycles per instruction",
864 "BriefDescription": "Cycles per group",
876 "BriefDescription": "% DTLB miss rate per inst",
930 "BriefDescription": "Instructions per group",
936 "BriefDescription": "Instructions per cycles",
942 "BriefDescription": "% ITLB miss rate per inst",
948 "BriefDescription": "Percentage of L1 load misses per L1 load ref",
954 "BriefDescription": "Percentage of L1 store misses per run instruction",
960 "BriefDescription": "Percentage of L1 store misses per L1 store ref",
966 "BriefDescription": "L2 Instruction Miss Rate (per instruction)(%)",
972 "BriefDescription": "L2 dmand Load Miss Rate (per run instruction)(%)",
978 "BriefDescription": "L2 PTEG Miss Rate (per run instruction)(%)",
984 "BriefDescription": "Percentage of L2 store misses per run instruction",
990 "BriefDescription": "L3 Instruction Miss Rate (per instruction)(%)",
996 "BriefDescription": "L3 demand Load Miss Rate (per run instruction)(%)",
1002 "BriefDescription": "L3 PTEG Miss Rate (per run instruction)(%)",
1008 "BriefDescription": "Run cycles per cycle",
1050 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Modified) per Inst",
1056 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Shared) per Inst",
1062 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
1068 "BriefDescription": "% of ICache reloads from Distant Memory per Inst",
1074 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
1080 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
1086 "BriefDescription": "% of ICache reloads from L2 per Inst",
1092 "BriefDescription": "% of ICache reloads from Private L3, other core per Inst",
1098 "BriefDescription": "% of ICache reloads from Private L3 other core per Inst",
1104 "BriefDescription": "% of ICache reloads from L3 per Inst",
1110 "BriefDescription": "% of ICache reloads from Local L4 per Inst",
1116 "BriefDescription": "% of ICache reloads from Local Memory per Inst",
1122 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Modified) per Inst",
1128 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Shared) per Inst",
1134 "BriefDescription": "% of ICache reloads from Remote L4 per Inst",
1140 "BriefDescription": "% of ICache reloads from Remote Memory per Inst",
1146 "BriefDescription": "Instruction Cache Miss Rate (Per run Instruction)(%)",
1152 "BriefDescription": "% Branches per instruction",
1218 "BriefDescription": "Icache Fetchs per Icache Miss",
1332 "BriefDescription": "L2 Store misses as a % of total L2 Store dispatches (per thread)",
1338 …"BriefDescription": "Percentage of L2 store misses per drained store. A drained store may contain…
1632 "BriefDescription": "Number of loads from local memory per loads from distant memory",
1638 … "BriefDescription": "Number of loads from local memory per loads from remote and distant memory",
1644 "BriefDescription": "Number of loads from local memory per loads from remote memory",
1650 "BriefDescription": "Number of loads from remote memory per loads from distant memory",
1662 "BriefDescription": "DERAT Miss Rate (per run instruction)(%)",
1668 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Modified) per inst",
1674 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Shared) per inst",
1680 "BriefDescription": "% of DERAT reloads from Distant L4 per inst",
1686 "BriefDescription": "% of DERAT reloads from Distant Memory per inst",
1692 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1698 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1704 "BriefDescription": "% of DERAT reloads from L2 per inst",
1710 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1716 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1722 "BriefDescription": "% of DERAT reloads from L3 per inst",
1728 "BriefDescription": "% of DERAT reloads from Local L4 per inst",
1734 "BriefDescription": "% of DERAT reloads from Local Memory per inst",
1740 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Modified) per inst",
1746 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Shared) per inst",
1752 "BriefDescription": "% of DERAT reloads from Remote L4 per inst",
1758 "BriefDescription": "% of DERAT reloads from Remote Memory per inst",
1866 "BriefDescription": "% DERAT miss ratio for 16G page per inst",
1878 "BriefDescription": "% DERAT miss rate for 16M page per inst",
1890 "BriefDescription": "% DERAT miss rate for 4K page per inst",
1902 "BriefDescription": "% DERAT miss ratio for 64K page per inst",
1914 "BriefDescription": "% DSLB_Miss_Rate per inst",
1920 "BriefDescription": "% ISLB miss rate per inst",
1926 …"Fraction of hits on any Centaur (local, remote, or distant) on either L4 or DRAM per L1 load ref",
1946 … "BriefDescription": "Fraction of hits on a distant chip's Centaur (L4 or DRAM) per L1 load ref",
1956 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
1971 … of a line in the M (exclusive) state on the L2 or L3 of a core on a distant chip per L1 load ref",
1976 …tion of hits of a line in the S state on the L2 or L3 of a core on a distant chip per L1 load ref",
1981 "BriefDescription": "Fraction of hits on a distant Centaur's cache per L1 load ref",
1986 "BriefDescription": "Fraction of hits on a distant Centaur's DRAM per L1 load ref",
2036 "BriefDescription": "Fraction of L1 hits per load ref",
2041 "BriefDescription": "Fraction of L1 load misses per L1 load ref",
2046 … "BriefDescription": "Fraction of hits on another core's L2 on the same chip per L1 load ref",
2051 …f hits of a line in the M (exclusive) state on another core's L2 on the same chip per L1 load ref",
2056 … "Fraction of hits of a line in the S state on another core's L2 on the same chip per L1 load ref",
2066 "BriefDescription": "Fraction of L2 load hits per L1 load ref",
2071 "BriefDescription": "Fraction of L2 load misses per L1 load ref",
2076 …"BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 experienced a Load-Hit-…
2081 …"BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 did not experience a co…
2086 …"BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 experienced some confli…
2106 … "BriefDescription": "Fraction of hits on another core's L3 on the same chip per L1 load ref",
2111 …f hits of a line in the M (exclusive) state on another core's L3 on the same chip per L1 load ref",
2116 … "Fraction of hits of a line in the S state on another core's L3 on the same chip per L1 load ref",
2121 …"BriefDescription": "Fraction of L3 load hits per load ref where the demand load collided with a p…
2126 "BriefDescription": "Fraction of L3 load hits per L1 load ref",
2131 "BriefDescription": "Fraction of L3 load misses per L1 load ref",
2136 …"BriefDescription": "Fraction of L3 load hits per load ref where the L3 did not experience a confl…
2141 …"BriefDescription": "Fraction of L3 hits on lines that were not in the MEPF state per L1 load ref",
2146 …action of L3 hits on lines that were recently prefetched into the L3 (MEPF state) per L1 load ref",
2151 "BriefDescription": "Fraction of hits on a local Centaur's cache per L1 load ref",
2156 "BriefDescription": "Fraction of hits on a local Centaur's DRAM per L1 load ref",
2161 "BriefDescription": "Fraction of hits on a local Centaur (L4 or DRAM) per L1 load ref",
2171 …action of hits on another core's L2 or L3 on a different chip (remote or distant) per L1 load ref",
2176 …"BriefDescription": "Fraction of hits on another core's L2 or L3 on the same chip per L1 load ref",
2181 … "BriefDescription": "Fraction of hits on a remote chip's Centaur (L4 or DRAM) per L1 load ref",
2191 …s of a line in the M (exclusive) state on the L2 or L3 of a core on a remote chip per L1 load ref",
2196 …ction of hits of a line in the S state on the L2 or L3 of a core on a remote chip per L1 load ref",
2201 "BriefDescription": "Fraction of hits on a remote Centaur's cache per L1 load ref",
2206 "BriefDescription": "Fraction of hits on a remote Centaur's DRAM per L1 load ref",