Lines Matching full:prefetch

89 …3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)",
90 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
95 …3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)",
96 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
101 …other chip's L4 on a different Node or Group (Distant) due to an instruction fetch (not prefetch)",
102 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
107 …ther chip's memory on the same Node or Group (Distant) due to an instruction fetch (not prefetch)",
108 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
113 …'s Instruction cache was reloaded from local core's L2 due to an instruction fetch (not prefetch)",
114 … core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
119 …eloaded from a location other than the local core's L2 due to an instruction fetch (not prefetch)",
120 … core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
125 …aded from local core's L2 with load hit store conflict due to an instruction fetch (not prefetch)",
126 …e conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
131 …s reloaded from local core's L2 with dispatch conflict due to an instruction fetch (not prefetch)",
132 …h conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
137 …ore's L2 hit without dispatch conflicts on Mepf state. due to an instruction fetch (not prefetch)",
138 …epf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
143 …che was reloaded from local core's L2 without conflict due to an instruction fetch (not prefetch)",
144 …t conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
149 …'s Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch)",
150 … core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
162 … core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
167 …s reloaded from local core's L3 with dispatch conflict due to an instruction fetch (not prefetch)",
168 …h conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
173 …ore's L3 without dispatch conflicts hit on Mepf state. due to an instruction fetch (not prefetch)",
174 …epf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
179 …che was reloaded from local core's L3 without conflict due to an instruction fetch (not prefetch)",
180 …t conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
185 …tion cache was reloaded from the local chip's L4 cache due to an instruction fetch (not prefetch)",
186 …s L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
191 …uction cache was reloaded from the local chip's Memory due to an instruction fetch (not prefetch)",
192 …p's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
197 …ory location including L4 from local remote or distant due to an instruction fetch (not prefetch)",
198 …or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
203 …r core's L2/L3 on a different chip (remote or distant) due to an instruction fetch (not prefetch)",
204 …r distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
209 …dified data from another core's L2/L3 on the same chip due to an instruction fetch (not prefetch)",
210 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
215 …or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)",
216 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
221 …or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)",
222 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
227 … another chip's L4 on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)",
228 … ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
233 …ther chip's memory on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)",
234 … ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
443 … all Icache reloads includes demand, prefetchm prefetch turned into demand and demand turned into …
449 …  "BriefDescription": "Counts all Icache prefetch reloads ( includes demand turned into prefetch)",