Lines Matching full:pipeline

5 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss or…
55 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
60 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline finished at dispatch a…
85 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
90 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the s…
95 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a lwsync waiting t…
125 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was dispatched but not…
140 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the L…
145 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline required special handl…
155 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
160 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
195 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the V…
205 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a stcx waiting for…
220 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIE instructio…
225 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in any u…
230 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. Note t…
250 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting to finish …
255 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store instructio…
260 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss an…
275 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store whose cach…
280 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for the no…
285 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a simple fixed poi…
290 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
295 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was not allowed to com…
310 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
315 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was finishing a load a…
350 … are the cycles between finish and completion for the oldest pair of instructions in the pipeline."
360 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered an ERAT miss …
365 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
370 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline cannot complete becaus…
375 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
385 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a load instruction…
390 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a PTESYNC instruct…
395 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the B…
400 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a hwsync waiting f…
405 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIEL instructi…
420 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline completed without an n…