Lines Matching full:events
1 i synthesize instructions events
2 y synthesize cycles events
3 b synthesize branches events (branch misses for Arm SPE)
4 c synthesize branches events (calls only)
5 r synthesize branches events (returns only)
6 x synthesize transactions events
7 w synthesize ptwrite events
8 p synthesize power events (incl. PSB events for Intel PT)
9 o synthesize other events recorded due to the use
11 I synthesize interrupt or similar (asynchronous) events
13 e synthesize error events
15 f synthesize first level cache events
16 m synthesize last level cache events
17 M synthesize memory events
18 t synthesize TLB events
19 a synthesize remote access events
24 s skip initial number of events
29 The default is all events i.e. the same as --itrace=iybxwpe,
33 for instructions events can be specified in units of:
42 transactions events can be specified.
45 instructions or transactions events can be specified.
51 It is also possible to skip events generated (instructions, branches, transactions,
67 a all perf events