Lines Matching refs:out

110 We can abstract out the important pieces of the driver code as follows
214 Consistency memory model; doing so would rule out too many valuable
245 impossible.  (Exercise: Figure out the reasoning.)  But TSO allows
265 The counterpart to ordering is a cycle.  Ordering rules out cycles:
400 lift the stores out of the conditional, transforming the code into
532 (If the assumption turns out to be wrong the resulting behavior will
1090 then ignore the result if it turns out that the second load shouldn't
1099 that looks as if the loads were executed out of order (see the next
1117 R; if the speculation turns out to be wrong then the CPU merely has to
1149 allowing out-of-order writes like this to occur.  The model avoided
1267 nearly simultaneous, either one can come out on top.  Similarly,
1335 out of program order.  This next one should look familiar:
1442 links.  Let's see how this definition works out.
1748 a forbidden cycle.  Thus the "rcu" axiom rules out this violation of
1752 works out in practice.  Consider the RCU code example from above, this
1845 This requires P0 and P2 to execute their loads and stores out of
2204 to carry out the load twice (for the comparison against NULL, then again
2317 To see how this works out in practice, consider our old friend, the MP
2388 then execute some of those accesses out of program order, but we
2431 	Consequently U's store to buf, no matter how it is carried out
2448 executes (assuming V does execute), ruling out the possibility of a
2578 Finally, it turns out there is a situation in which a plain write does
2655 accesses.  Nevertheless, we do want to rule out such cycles, because
2723 x, and then the increment is carried out by the memory hardware with