Lines Matching +full:extended +full:- +full:range +full:- +full:enable
12 1, 0, EAX, 19:16, model_ext, Extended Model ID
13 1, 0, EAX, 27:20, family_ext, Extended Family ID
22 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout
33 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported
36 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present
43 …1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline …
45 1, 0, ECX, 26, xsave, XSAVE/XRSTOR processor extended states (XSETBV/XGETBV/XCR0)
46 1, 0, ECX, 27, osxsave, OS has set CR4.OSXSAVE bit to enable XSETBV/XGETBV/XCR0
48 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported
52 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement
62 1, 0, EDX, 12, mtrr, Memory Type Range Registers
67 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension
81 1, 0, EDX, 31, pbe, Pending Break Enable
103 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1
104 … 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads s…
112 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported
114 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT
115 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT
116 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT
117 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT
118 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT
119 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT
120 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT
121 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT
150 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported
154 # AVX512 refers to https://en.wikipedia.org/wiki/AVX-512
164 7, 0, EBX, 7, smep, Supervisor-Mode Execution Prevention
191 7, 0, ECX, 2, umip, User-mode Instruction Prevention
193 7, 0, ECX, 3, pku, Protection Keys for User-mode pages
194 7, 0, ECX, 4, ospke, CR4 PKE set to enable protection keys
196 …, ECX, 21:17, mawau, The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode
217 0xA, 0, EAX, 15:8, pmu_gp_cnt_num, Numer of general-purose PMU counters per logical CPU
224 0xA, 0, EBX, 3, pmu_no_llc_ref_evt, Last-level cache reference event not available
225 0xA, 0, EBX, 4, pmu_no_llc_mis_evt, Last-level cache misses event not available
233 # Extended Topology Enumeration Leaf
238 0xB, 0, ECX, 15:8, lvl_type, 0-Invalid 1-SMT 2-Core
243 # Processor Extended State
249 0xD, 0, EAX, 7:5, avx512, AVX-512 state
270 …0xF, 0, EBX, 31:0, rmid_range, Maximum range (zero-based) of RMID within this physical proce…
273 0xF, 1, ECX, 31:0, rmid_range, Maximum range (zero-based) of RMID of this types
314 # System-On-Chip Vendor Attribute
316 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf
333 0x1A, 0, EAX, 31:24, core_type, 20H-Intel_Atom 40H-Intel_Core
337 # V2 Extended Topology - A preferred superset to leaf 0BH
341 # 40000000H - 4FFFFFFFH is invalid range
344 # Extended Processor Signature and Feature Bits
346 0x80000001, 0, EAX, 27:20, extfamily, Extended family
347 0x80000001, 0, EAX, 19:16, extmodel, Extended model
354 0x80000001, 0, ECX, 0, lahf_lm, LAHF/SAHF available in 64-bit mode
355 0x80000001, 0, ECX, 1, cmplegacy, Core multi-processing legacy mode
357 0x80000001, 0, ECX, 3, extapicspace, Extended APIC register space
363 0x80000001, 0, ECX, 9, osvw, OS Visible Work-around support
365 0x80000001, 0, ECX, 11, xop, Extended operation support
369 0x80000001, 0, ECX, 16, fma4, Four-operand FMA instruction support
372 0x80000001, 0, ECX, 23, perfctrextcore, Indicates support for Core::X86::Msr::PERF_CTL0 - 5…
375 0x80000001, 0, ECX, 27, perftsc, Performance time-stamp counter supported
380 0x80000001, 0, EDX, 0, fpu, x87 floating point unit on-chip
381 0x80000001, 0, EDX, 1, vme, Virtual-mode enhancements
383 0x80000001, 0, EDX, 3, pse, Page-size extensions (4 MB pages)
385 0x80000001, 0, EDX, 5, msr, Model-specific registers (MSRs), with RDMSR and WRMSR instruct…
386 0x80000001, 0, EDX, 6, pae, Physical-address extensions (PAE)
391 0x80000001, 0, EDX, 12, mtrr, Memory-type range registers
396 0x80000001, 0, EDX, 17, pse36, Page-size extensions
415 # Extended L2 Cache Features
434 # EAX: Extended APIC ID
435 0x8000001E, 0, EAX, 31:0, extended_apic_id, Extended APIC ID
448 0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory encryption
450 0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-en…
451 …0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabled, SEV-ES-disabled guest