Lines Matching refs:u32
34 u32 link_mask; /* channel mask for the direction */
35 u32 threshold; /* FIFO threshold */
52 u32 dn_rx_offset;
67 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) in omap_mcpdm_write()
119 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL); in omap_mcpdm_start()
120 u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask; in omap_mcpdm_start()
138 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL); in omap_mcpdm_stop()
139 u32 link_mask = MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK; in omap_mcpdm_stop()
167 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL); in omap_mcpdm_open_streams()
177 u32 dn_offset = mcpdm->dn_rx_offset; in omap_mcpdm_open_streams()
301 u32 threshold; in omap_mcpdm_dai_hw_params()