Lines Matching +full:omap +full:- +full:sdma
1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port
24 #include "omap-mcbsp-priv.h"
25 #include "omap-mcbsp.h"
26 #include "sdma-pcm.h"
41 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); in omap_mcbsp_dump_reg()
42 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", MCBSP_READ(mcbsp, DRR2)); in omap_mcbsp_dump_reg()
43 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", MCBSP_READ(mcbsp, DRR1)); in omap_mcbsp_dump_reg()
44 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", MCBSP_READ(mcbsp, DXR2)); in omap_mcbsp_dump_reg()
45 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", MCBSP_READ(mcbsp, DXR1)); in omap_mcbsp_dump_reg()
46 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", MCBSP_READ(mcbsp, SPCR2)); in omap_mcbsp_dump_reg()
47 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", MCBSP_READ(mcbsp, SPCR1)); in omap_mcbsp_dump_reg()
48 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", MCBSP_READ(mcbsp, RCR2)); in omap_mcbsp_dump_reg()
49 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", MCBSP_READ(mcbsp, RCR1)); in omap_mcbsp_dump_reg()
50 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", MCBSP_READ(mcbsp, XCR2)); in omap_mcbsp_dump_reg()
51 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", MCBSP_READ(mcbsp, XCR1)); in omap_mcbsp_dump_reg()
52 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", MCBSP_READ(mcbsp, SRGR2)); in omap_mcbsp_dump_reg()
53 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", MCBSP_READ(mcbsp, SRGR1)); in omap_mcbsp_dump_reg()
54 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", MCBSP_READ(mcbsp, PCR0)); in omap_mcbsp_dump_reg()
55 dev_dbg(mcbsp->dev, "***********************\n"); in omap_mcbsp_dump_reg()
69 return -EINVAL; in omap2_mcbsp_set_clks_src()
71 fck_src = clk_get(mcbsp->dev, src); in omap2_mcbsp_set_clks_src()
73 dev_info(mcbsp->dev, "CLKS: could not clk_get() %s\n", src); in omap2_mcbsp_set_clks_src()
77 if (mcbsp->active) in omap2_mcbsp_set_clks_src()
78 pm_runtime_put_sync(mcbsp->dev); in omap2_mcbsp_set_clks_src()
80 r = clk_set_parent(mcbsp->fclk, fck_src); in omap2_mcbsp_set_clks_src()
82 dev_err(mcbsp->dev, "CLKS: could not clk_set_parent() to %s\n", in omap2_mcbsp_set_clks_src()
85 if (mcbsp->active) in omap2_mcbsp_set_clks_src()
86 pm_runtime_get_sync(mcbsp->dev); in omap2_mcbsp_set_clks_src()
99 dev_dbg(mcbsp->dev, "IRQ callback : 0x%x\n", irqst); in omap_mcbsp_irq_handler()
102 dev_err(mcbsp->dev, "RX Frame Sync Error!\n"); in omap_mcbsp_irq_handler()
104 dev_dbg(mcbsp->dev, "RX Frame Sync\n"); in omap_mcbsp_irq_handler()
106 dev_dbg(mcbsp->dev, "RX End Of Frame\n"); in omap_mcbsp_irq_handler()
108 dev_dbg(mcbsp->dev, "RX Buffer Threshold Reached\n"); in omap_mcbsp_irq_handler()
110 dev_err(mcbsp->dev, "RX Buffer Underflow!\n"); in omap_mcbsp_irq_handler()
112 dev_err(mcbsp->dev, "RX Buffer Overflow!\n"); in omap_mcbsp_irq_handler()
115 dev_err(mcbsp->dev, "TX Frame Sync Error!\n"); in omap_mcbsp_irq_handler()
117 dev_dbg(mcbsp->dev, "TX Frame Sync\n"); in omap_mcbsp_irq_handler()
119 dev_dbg(mcbsp->dev, "TX End Of Frame\n"); in omap_mcbsp_irq_handler()
121 dev_dbg(mcbsp->dev, "TX Buffer threshold Reached\n"); in omap_mcbsp_irq_handler()
123 dev_err(mcbsp->dev, "TX Buffer Underflow!\n"); in omap_mcbsp_irq_handler()
125 dev_err(mcbsp->dev, "TX Buffer Overflow!\n"); in omap_mcbsp_irq_handler()
127 dev_dbg(mcbsp->dev, "TX Buffer empty at end of frame\n"); in omap_mcbsp_irq_handler()
140 dev_dbg(mcbsp->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2); in omap_mcbsp_tx_irq_handler()
143 dev_err(mcbsp->dev, "TX Frame Sync Error! : 0x%x\n", in omap_mcbsp_tx_irq_handler()
158 dev_dbg(mcbsp->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1); in omap_mcbsp_rx_irq_handler()
161 dev_err(mcbsp->dev, "RX Frame Sync Error! : 0x%x\n", in omap_mcbsp_rx_irq_handler()
179 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", in omap_mcbsp_config()
180 mcbsp->id, mcbsp->phys_base); in omap_mcbsp_config()
183 MCBSP_WRITE(mcbsp, SPCR2, config->spcr2); in omap_mcbsp_config()
184 MCBSP_WRITE(mcbsp, SPCR1, config->spcr1); in omap_mcbsp_config()
185 MCBSP_WRITE(mcbsp, RCR2, config->rcr2); in omap_mcbsp_config()
186 MCBSP_WRITE(mcbsp, RCR1, config->rcr1); in omap_mcbsp_config()
187 MCBSP_WRITE(mcbsp, XCR2, config->xcr2); in omap_mcbsp_config()
188 MCBSP_WRITE(mcbsp, XCR1, config->xcr1); in omap_mcbsp_config()
189 MCBSP_WRITE(mcbsp, SRGR2, config->srgr2); in omap_mcbsp_config()
190 MCBSP_WRITE(mcbsp, SRGR1, config->srgr1); in omap_mcbsp_config()
191 MCBSP_WRITE(mcbsp, MCR2, config->mcr2); in omap_mcbsp_config()
192 MCBSP_WRITE(mcbsp, MCR1, config->mcr1); in omap_mcbsp_config()
193 MCBSP_WRITE(mcbsp, PCR0, config->pcr0); in omap_mcbsp_config()
194 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_config()
195 MCBSP_WRITE(mcbsp, XCCR, config->xccr); in omap_mcbsp_config()
196 MCBSP_WRITE(mcbsp, RCCR, config->rccr); in omap_mcbsp_config()
199 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_config()
203 if (mcbsp->irq) in omap_mcbsp_config()
209 * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
222 if (mcbsp->pdata->reg_size == 2) in omap_mcbsp_dma_reg_params()
227 if (mcbsp->pdata->reg_size == 2) in omap_mcbsp_dma_reg_params()
233 return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; in omap_mcbsp_dma_reg_params()
238 * The threshold parameter is 1 based, and it is converted (threshold - 1)
243 if (threshold && threshold <= mcbsp->max_tx_thres) in omap_mcbsp_set_tx_threshold()
244 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); in omap_mcbsp_set_tx_threshold()
249 * The threshold parameter is 1 based, and it is converted (threshold - 1)
254 if (threshold && threshold <= mcbsp->max_rx_thres) in omap_mcbsp_set_rx_threshold()
255 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); in omap_mcbsp_set_rx_threshold()
269 return mcbsp->pdata->buffer_size - buffstat; in omap_mcbsp_get_tx_delay()
289 return threshold - buffstat; in omap_mcbsp_get_rx_delay()
297 reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); in omap_mcbsp_request()
299 return -ENOMEM; in omap_mcbsp_request()
301 spin_lock(&mcbsp->lock); in omap_mcbsp_request()
302 if (!mcbsp->free) { in omap_mcbsp_request()
303 dev_err(mcbsp->dev, "McBSP%d is currently in use\n", mcbsp->id); in omap_mcbsp_request()
304 err = -EBUSY; in omap_mcbsp_request()
308 mcbsp->free = false; in omap_mcbsp_request()
309 mcbsp->reg_cache = reg_cache; in omap_mcbsp_request()
310 spin_unlock(&mcbsp->lock); in omap_mcbsp_request()
312 if(mcbsp->pdata->ops && mcbsp->pdata->ops->request) in omap_mcbsp_request()
313 mcbsp->pdata->ops->request(mcbsp->id - 1); in omap_mcbsp_request()
316 * Make sure that transmitter, receiver and sample-rate generator are in omap_mcbsp_request()
322 if (mcbsp->irq) { in omap_mcbsp_request()
323 err = request_irq(mcbsp->irq, omap_mcbsp_irq_handler, 0, in omap_mcbsp_request()
326 dev_err(mcbsp->dev, "Unable to request IRQ\n"); in omap_mcbsp_request()
330 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, 0, in omap_mcbsp_request()
333 dev_err(mcbsp->dev, "Unable to request TX IRQ\n"); in omap_mcbsp_request()
337 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler, 0, in omap_mcbsp_request()
340 dev_err(mcbsp->dev, "Unable to request RX IRQ\n"); in omap_mcbsp_request()
347 free_irq(mcbsp->tx_irq, (void *)mcbsp); in omap_mcbsp_request()
349 if(mcbsp->pdata->ops && mcbsp->pdata->ops->free) in omap_mcbsp_request()
350 mcbsp->pdata->ops->free(mcbsp->id - 1); in omap_mcbsp_request()
353 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_request()
356 spin_lock(&mcbsp->lock); in omap_mcbsp_request()
357 mcbsp->free = true; in omap_mcbsp_request()
358 mcbsp->reg_cache = NULL; in omap_mcbsp_request()
360 spin_unlock(&mcbsp->lock); in omap_mcbsp_request()
370 if(mcbsp->pdata->ops && mcbsp->pdata->ops->free) in omap_mcbsp_free()
371 mcbsp->pdata->ops->free(mcbsp->id - 1); in omap_mcbsp_free()
374 if (mcbsp->pdata->has_wakeup) in omap_mcbsp_free()
378 if (mcbsp->irq) { in omap_mcbsp_free()
381 free_irq(mcbsp->irq, (void *)mcbsp); in omap_mcbsp_free()
383 free_irq(mcbsp->rx_irq, (void *)mcbsp); in omap_mcbsp_free()
384 free_irq(mcbsp->tx_irq, (void *)mcbsp); in omap_mcbsp_free()
387 reg_cache = mcbsp->reg_cache; in omap_mcbsp_free()
399 spin_lock(&mcbsp->lock); in omap_mcbsp_free()
400 if (mcbsp->free) in omap_mcbsp_free()
401 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id); in omap_mcbsp_free()
403 mcbsp->free = true; in omap_mcbsp_free()
404 mcbsp->reg_cache = NULL; in omap_mcbsp_free()
405 spin_unlock(&mcbsp->lock); in omap_mcbsp_free()
412 * If no transmitter or receiver is active prior calling, then sample-rate
422 if (mcbsp->st_data) in omap_mcbsp_start()
460 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_start()
483 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_stop()
493 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_stop()
510 if (mcbsp->st_data) in omap_mcbsp_stop()
514 #define max_thres(m) (mcbsp->pdata->buffer_size)
522 return sysfs_emit(buf, "%u\n", mcbsp->prop); \
538 return -EDOM; \
540 mcbsp->prop = val; \
561 dma_op_mode = mcbsp->dma_op_mode; in dma_op_mode_show()
585 spin_lock_irq(&mcbsp->lock); in dma_op_mode_store()
586 if (!mcbsp->free) { in dma_op_mode_store()
587 size = -EBUSY; in dma_op_mode_store()
590 mcbsp->dma_op_mode = i; in dma_op_mode_store()
593 spin_unlock_irq(&mcbsp->lock); in dma_op_mode_store()
621 spin_lock_init(&mcbsp->lock); in omap_mcbsp_init()
622 mcbsp->free = true; in omap_mcbsp_init()
628 mcbsp->io_base = devm_ioremap_resource(&pdev->dev, res); in omap_mcbsp_init()
629 if (IS_ERR(mcbsp->io_base)) in omap_mcbsp_init()
630 return PTR_ERR(mcbsp->io_base); in omap_mcbsp_init()
632 mcbsp->phys_base = res->start; in omap_mcbsp_init()
633 mcbsp->reg_cache_size = resource_size(res); in omap_mcbsp_init()
637 mcbsp->phys_dma_base = mcbsp->phys_base; in omap_mcbsp_init()
639 mcbsp->phys_dma_base = res->start; in omap_mcbsp_init()
648 mcbsp->irq = platform_get_irq_byname(pdev, "common"); in omap_mcbsp_init()
649 if (mcbsp->irq == -ENXIO) { in omap_mcbsp_init()
650 mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); in omap_mcbsp_init()
652 if (mcbsp->tx_irq == -ENXIO) { in omap_mcbsp_init()
653 mcbsp->irq = platform_get_irq(pdev, 0); in omap_mcbsp_init()
654 mcbsp->tx_irq = 0; in omap_mcbsp_init()
656 mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); in omap_mcbsp_init()
657 mcbsp->irq = 0; in omap_mcbsp_init()
661 if (!pdev->dev.of_node) { in omap_mcbsp_init()
664 dev_err(&pdev->dev, "invalid tx DMA channel\n"); in omap_mcbsp_init()
665 return -ENODEV; in omap_mcbsp_init()
667 mcbsp->dma_req[0] = res->start; in omap_mcbsp_init()
668 mcbsp->dma_data[0].filter_data = &mcbsp->dma_req[0]; in omap_mcbsp_init()
672 dev_err(&pdev->dev, "invalid rx DMA channel\n"); in omap_mcbsp_init()
673 return -ENODEV; in omap_mcbsp_init()
675 mcbsp->dma_req[1] = res->start; in omap_mcbsp_init()
676 mcbsp->dma_data[1].filter_data = &mcbsp->dma_req[1]; in omap_mcbsp_init()
678 mcbsp->dma_data[0].filter_data = "tx"; in omap_mcbsp_init()
679 mcbsp->dma_data[1].filter_data = "rx"; in omap_mcbsp_init()
682 mcbsp->dma_data[0].addr = omap_mcbsp_dma_reg_params(mcbsp, in omap_mcbsp_init()
684 mcbsp->dma_data[1].addr = omap_mcbsp_dma_reg_params(mcbsp, in omap_mcbsp_init()
687 mcbsp->fclk = devm_clk_get(&pdev->dev, "fck"); in omap_mcbsp_init()
688 if (IS_ERR(mcbsp->fclk)) { in omap_mcbsp_init()
689 ret = PTR_ERR(mcbsp->fclk); in omap_mcbsp_init()
690 dev_err(mcbsp->dev, "unable to get fck: %d\n", ret); in omap_mcbsp_init()
694 mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; in omap_mcbsp_init()
695 if (mcbsp->pdata->buffer_size) { in omap_mcbsp_init()
704 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; in omap_mcbsp_init()
705 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; in omap_mcbsp_init()
707 ret = devm_device_add_group(mcbsp->dev, &additional_attr_group); in omap_mcbsp_init()
709 dev_err(mcbsp->dev, in omap_mcbsp_init()
731 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_set_threshold()
736 * packet_size, when the sDMA is in packet mode, or based on the in omap_mcbsp_set_threshold()
746 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in omap_mcbsp_set_threshold()
759 struct omap_mcbsp *mcbsp = rule->private; in omap_mcbsp_hwrule_min_buffersize()
764 size = mcbsp->pdata->buffer_size; in omap_mcbsp_hwrule_min_buffersize()
766 frames.min = size / channels->min; in omap_mcbsp_hwrule_min_buffersize()
795 if (mcbsp->pdata->buffer_size) { in omap_mcbsp_dai_startup()
801 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in omap_mcbsp_dai_startup()
802 snd_pcm_hw_rule_add(substream->runtime, 0, in omap_mcbsp_dai_startup()
806 SNDRV_PCM_HW_PARAM_CHANNELS, -1); in omap_mcbsp_dai_startup()
809 snd_pcm_hw_constraint_step(substream->runtime, 0, in omap_mcbsp_dai_startup()
820 int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); in omap_mcbsp_dai_shutdown()
824 if (mcbsp->latency[stream2]) in omap_mcbsp_dai_shutdown()
825 cpu_latency_qos_update_request(&mcbsp->pm_qos_req, in omap_mcbsp_dai_shutdown()
826 mcbsp->latency[stream2]); in omap_mcbsp_dai_shutdown()
827 else if (mcbsp->latency[stream1]) in omap_mcbsp_dai_shutdown()
828 cpu_latency_qos_remove_request(&mcbsp->pm_qos_req); in omap_mcbsp_dai_shutdown()
830 mcbsp->latency[stream1] = 0; in omap_mcbsp_dai_shutdown()
834 mcbsp->configured = 0; in omap_mcbsp_dai_shutdown()
842 struct pm_qos_request *pm_qos_req = &mcbsp->pm_qos_req; in omap_mcbsp_dai_prepare()
843 int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); in omap_mcbsp_dai_prepare()
846 int latency = mcbsp->latency[stream2]; in omap_mcbsp_dai_prepare()
848 /* Prevent omap hardware from hitting off between FIFO fills */ in omap_mcbsp_dai_prepare()
849 if (!latency || mcbsp->latency[stream1] < latency) in omap_mcbsp_dai_prepare()
850 latency = mcbsp->latency[stream1]; in omap_mcbsp_dai_prepare()
869 mcbsp->active++; in omap_mcbsp_dai_trigger()
870 omap_mcbsp_start(mcbsp, substream->stream); in omap_mcbsp_dai_trigger()
876 omap_mcbsp_stop(mcbsp, substream->stream); in omap_mcbsp_dai_trigger()
877 mcbsp->active--; in omap_mcbsp_dai_trigger()
880 return -EINVAL; in omap_mcbsp_dai_trigger()
897 if (mcbsp->pdata->buffer_size == 0) in omap_mcbsp_dai_delay()
900 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in omap_mcbsp_dai_delay()
910 delay = fifo_use / substream->runtime->channels; in omap_mcbsp_dai_delay()
920 struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; in omap_mcbsp_dai_hw_params()
925 unsigned int buffer_size = mcbsp->pdata->buffer_size; in omap_mcbsp_dai_hw_params()
938 return -EINVAL; in omap_mcbsp_dai_hw_params()
943 if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { in omap_mcbsp_dai_hw_params()
948 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in omap_mcbsp_dai_hw_params()
949 max_thrsh = mcbsp->max_tx_thres; in omap_mcbsp_dai_hw_params()
951 max_thrsh = mcbsp->max_rx_thres; in omap_mcbsp_dai_hw_params()
953 * Use sDMA packet mode if McBSP is in threshold mode: in omap_mcbsp_dai_hw_params()
966 return -EINVAL; in omap_mcbsp_dai_hw_params()
974 latency = (buffer_size - pkt_size) / channels; in omap_mcbsp_dai_hw_params()
976 (params->rate_num / params->rate_den); in omap_mcbsp_dai_hw_params()
977 mcbsp->latency[substream->stream] = latency; in omap_mcbsp_dai_hw_params()
982 dma_data->maxburst = pkt_size; in omap_mcbsp_dai_hw_params()
984 if (mcbsp->configured) { in omap_mcbsp_dai_hw_params()
989 regs->rcr2 &= ~(RPHASE | RFRLEN2(0x7f) | RWDLEN2(7)); in omap_mcbsp_dai_hw_params()
990 regs->xcr2 &= ~(RPHASE | XFRLEN2(0x7f) | XWDLEN2(7)); in omap_mcbsp_dai_hw_params()
991 regs->rcr1 &= ~(RFRLEN1(0x7f) | RWDLEN1(7)); in omap_mcbsp_dai_hw_params()
992 regs->xcr1 &= ~(XFRLEN1(0x7f) | XWDLEN1(7)); in omap_mcbsp_dai_hw_params()
993 format = mcbsp->fmt & SND_SOC_DAIFMT_FORMAT_MASK; in omap_mcbsp_dai_hw_params()
997 /* Use dual-phase frames */ in omap_mcbsp_dai_hw_params()
998 regs->rcr2 |= RPHASE; in omap_mcbsp_dai_hw_params()
999 regs->xcr2 |= XPHASE; in omap_mcbsp_dai_hw_params()
1001 wpf--; in omap_mcbsp_dai_hw_params()
1002 regs->rcr2 |= RFRLEN2(wpf - 1); in omap_mcbsp_dai_hw_params()
1003 regs->xcr2 |= XFRLEN2(wpf - 1); in omap_mcbsp_dai_hw_params()
1006 regs->rcr1 |= RFRLEN1(wpf - 1); in omap_mcbsp_dai_hw_params()
1007 regs->xcr1 |= XFRLEN1(wpf - 1); in omap_mcbsp_dai_hw_params()
1012 regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); in omap_mcbsp_dai_hw_params()
1013 regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); in omap_mcbsp_dai_hw_params()
1014 regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); in omap_mcbsp_dai_hw_params()
1015 regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); in omap_mcbsp_dai_hw_params()
1019 regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_32); in omap_mcbsp_dai_hw_params()
1020 regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_32); in omap_mcbsp_dai_hw_params()
1021 regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_32); in omap_mcbsp_dai_hw_params()
1022 regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_32); in omap_mcbsp_dai_hw_params()
1026 return -EINVAL; in omap_mcbsp_dai_hw_params()
1031 master = mcbsp->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; in omap_mcbsp_dai_hw_params()
1033 div = mcbsp->clk_div ? mcbsp->clk_div : 1; in omap_mcbsp_dai_hw_params()
1034 framesize = (mcbsp->in_freq / div) / params_rate(params); in omap_mcbsp_dai_hw_params()
1039 return -EINVAL; in omap_mcbsp_dai_hw_params()
1045 regs->srgr2 &= ~FPER(0xfff); in omap_mcbsp_dai_hw_params()
1046 regs->srgr1 &= ~FWID(0xff); in omap_mcbsp_dai_hw_params()
1050 regs->srgr2 |= FPER(framesize - 1); in omap_mcbsp_dai_hw_params()
1051 regs->srgr1 |= FWID((framesize >> 1) - 1); in omap_mcbsp_dai_hw_params()
1055 regs->srgr2 |= FPER(framesize - 1); in omap_mcbsp_dai_hw_params()
1056 regs->srgr1 |= FWID(0); in omap_mcbsp_dai_hw_params()
1060 omap_mcbsp_config(mcbsp, &mcbsp->cfg_regs); in omap_mcbsp_dai_hw_params()
1061 mcbsp->wlen = wlen; in omap_mcbsp_dai_hw_params()
1062 mcbsp->configured = 1; in omap_mcbsp_dai_hw_params()
1075 struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; in omap_mcbsp_dai_set_dai_fmt()
1078 if (mcbsp->configured) in omap_mcbsp_dai_set_dai_fmt()
1081 mcbsp->fmt = fmt; in omap_mcbsp_dai_set_dai_fmt()
1084 regs->spcr2 |= XINTM(3) | FREE; in omap_mcbsp_dai_set_dai_fmt()
1085 regs->spcr1 |= RINTM(3); in omap_mcbsp_dai_set_dai_fmt()
1087 if (!mcbsp->pdata->has_ccr) { in omap_mcbsp_dai_set_dai_fmt()
1088 regs->rcr2 |= RFIG; in omap_mcbsp_dai_set_dai_fmt()
1089 regs->xcr2 |= XFIG; in omap_mcbsp_dai_set_dai_fmt()
1093 if (mcbsp->pdata->has_ccr) { in omap_mcbsp_dai_set_dai_fmt()
1094 regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; in omap_mcbsp_dai_set_dai_fmt()
1095 regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; in omap_mcbsp_dai_set_dai_fmt()
1100 /* 1-bit data delay */ in omap_mcbsp_dai_set_dai_fmt()
1101 regs->rcr2 |= RDATDLY(1); in omap_mcbsp_dai_set_dai_fmt()
1102 regs->xcr2 |= XDATDLY(1); in omap_mcbsp_dai_set_dai_fmt()
1105 /* 0-bit data delay */ in omap_mcbsp_dai_set_dai_fmt()
1106 regs->rcr2 |= RDATDLY(0); in omap_mcbsp_dai_set_dai_fmt()
1107 regs->xcr2 |= XDATDLY(0); in omap_mcbsp_dai_set_dai_fmt()
1108 regs->spcr1 |= RJUST(2); in omap_mcbsp_dai_set_dai_fmt()
1113 /* 1-bit data delay */ in omap_mcbsp_dai_set_dai_fmt()
1114 regs->rcr2 |= RDATDLY(1); in omap_mcbsp_dai_set_dai_fmt()
1115 regs->xcr2 |= XDATDLY(1); in omap_mcbsp_dai_set_dai_fmt()
1120 /* 0-bit data delay */ in omap_mcbsp_dai_set_dai_fmt()
1121 regs->rcr2 |= RDATDLY(0); in omap_mcbsp_dai_set_dai_fmt()
1122 regs->xcr2 |= XDATDLY(0); in omap_mcbsp_dai_set_dai_fmt()
1128 return -EINVAL; in omap_mcbsp_dai_set_dai_fmt()
1134 regs->pcr0 |= FSXM | FSRM | in omap_mcbsp_dai_set_dai_fmt()
1137 regs->srgr2 |= FSGM; in omap_mcbsp_dai_set_dai_fmt()
1141 regs->srgr2 |= FSGM; in omap_mcbsp_dai_set_dai_fmt()
1142 regs->pcr0 |= FSXM | FSRM; in omap_mcbsp_dai_set_dai_fmt()
1149 return -EINVAL; in omap_mcbsp_dai_set_dai_fmt()
1160 regs->pcr0 |= FSXP | FSRP | in omap_mcbsp_dai_set_dai_fmt()
1164 regs->pcr0 |= CLKXP | CLKRP; in omap_mcbsp_dai_set_dai_fmt()
1167 regs->pcr0 |= FSXP | FSRP; in omap_mcbsp_dai_set_dai_fmt()
1172 return -EINVAL; in omap_mcbsp_dai_set_dai_fmt()
1175 regs->pcr0 ^= FSXP | FSRP; in omap_mcbsp_dai_set_dai_fmt()
1184 struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; in omap_mcbsp_dai_set_clkdiv()
1187 return -ENODEV; in omap_mcbsp_dai_set_clkdiv()
1189 mcbsp->clk_div = div; in omap_mcbsp_dai_set_clkdiv()
1190 regs->srgr1 &= ~CLKGDV(0xff); in omap_mcbsp_dai_set_clkdiv()
1191 regs->srgr1 |= CLKGDV(div - 1); in omap_mcbsp_dai_set_clkdiv()
1201 struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; in omap_mcbsp_dai_set_dai_sysclk()
1204 if (mcbsp->active) { in omap_mcbsp_dai_set_dai_sysclk()
1205 if (freq == mcbsp->in_freq) in omap_mcbsp_dai_set_dai_sysclk()
1208 return -EBUSY; in omap_mcbsp_dai_set_dai_sysclk()
1211 mcbsp->in_freq = freq; in omap_mcbsp_dai_set_dai_sysclk()
1212 regs->srgr2 &= ~CLKSM; in omap_mcbsp_dai_set_dai_sysclk()
1213 regs->pcr0 &= ~SCLKME; in omap_mcbsp_dai_set_dai_sysclk()
1217 regs->srgr2 |= CLKSM; in omap_mcbsp_dai_set_dai_sysclk()
1221 err = -EINVAL; in omap_mcbsp_dai_set_dai_sysclk()
1237 regs->srgr2 |= CLKSM; in omap_mcbsp_dai_set_dai_sysclk()
1238 regs->pcr0 |= SCLKME; in omap_mcbsp_dai_set_dai_sysclk()
1245 regs->pcr0 &= ~CLKXM; in omap_mcbsp_dai_set_dai_sysclk()
1248 regs->pcr0 |= SCLKME; in omap_mcbsp_dai_set_dai_sysclk()
1250 regs->pcr0 &= ~CLKRM; in omap_mcbsp_dai_set_dai_sysclk()
1253 err = -ENODEV; in omap_mcbsp_dai_set_dai_sysclk()
1263 pm_runtime_enable(mcbsp->dev); in omap_mcbsp_probe()
1266 &mcbsp->dma_data[SNDRV_PCM_STREAM_PLAYBACK], in omap_mcbsp_probe()
1267 &mcbsp->dma_data[SNDRV_PCM_STREAM_CAPTURE]); in omap_mcbsp_probe()
1276 pm_runtime_disable(mcbsp->dev); in omap_mcbsp_remove()
1312 .name = "omap-mcbsp",
1343 .compatible = "ti,omap2420-mcbsp",
1347 .compatible = "ti,omap2430-mcbsp",
1351 .compatible = "ti,omap3-mcbsp",
1355 .compatible = "ti,omap4-mcbsp",
1364 struct omap_mcbsp_platform_data *pdata = dev_get_platdata(&pdev->dev); in asoc_mcbsp_probe()
1369 match = of_match_device(omap_mcbsp_of_match, &pdev->dev); in asoc_mcbsp_probe()
1371 struct device_node *node = pdev->dev.of_node; in asoc_mcbsp_probe()
1375 pdata = devm_kzalloc(&pdev->dev, in asoc_mcbsp_probe()
1379 return -ENOMEM; in asoc_mcbsp_probe()
1381 memcpy(pdata, match->data, sizeof(*pdata)); in asoc_mcbsp_probe()
1382 if (!of_property_read_u32(node, "ti,buffer-size", &buffer_size)) in asoc_mcbsp_probe()
1383 pdata->buffer_size = buffer_size; in asoc_mcbsp_probe()
1385 pdata->force_ick_on = pdata_quirk->force_ick_on; in asoc_mcbsp_probe()
1387 dev_err(&pdev->dev, "missing platform data.\n"); in asoc_mcbsp_probe()
1388 return -EINVAL; in asoc_mcbsp_probe()
1390 mcbsp = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcbsp), GFP_KERNEL); in asoc_mcbsp_probe()
1392 return -ENOMEM; in asoc_mcbsp_probe()
1394 mcbsp->id = pdev->id; in asoc_mcbsp_probe()
1395 mcbsp->pdata = pdata; in asoc_mcbsp_probe()
1396 mcbsp->dev = &pdev->dev; in asoc_mcbsp_probe()
1403 if (mcbsp->pdata->reg_size == 2) { in asoc_mcbsp_probe()
1408 ret = devm_snd_soc_register_component(&pdev->dev, in asoc_mcbsp_probe()
1414 return sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); in asoc_mcbsp_probe()
1421 if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) in asoc_mcbsp_remove()
1422 mcbsp->pdata->ops->free(mcbsp->id); in asoc_mcbsp_remove()
1424 if (cpu_latency_qos_request_active(&mcbsp->pm_qos_req)) in asoc_mcbsp_remove()
1425 cpu_latency_qos_remove_request(&mcbsp->pm_qos_req); in asoc_mcbsp_remove()
1430 .name = "omap-mcbsp",
1441 MODULE_DESCRIPTION("OMAP I2S SoC Interface");
1443 MODULE_ALIAS("platform:omap-mcbsp");