Lines Matching +full:tdm +full:- +full:data +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Multi-channel Audio Serial Port Driver
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
19 #include <linux/delay.h>
39 #include "edma-pcm.h"
40 #include "sdma-pcm.h"
41 #include "udma-pcm.h"
42 #include "davinci-mcasp.h"
91 /* McASP specific data */
136 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits()
143 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits()
150 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits()
157 __raw_writel(val, mcasp->base + offset); in mcasp_set_reg()
162 return (u32)__raw_readl(mcasp->base + offset); in mcasp_get_reg()
172 /* loop count is to avoid the lock-up */ in mcasp_set_ctl_reg()
194 for_each_set_bit_from(bit, &mcasp->pdir, PIN_BIT_AFSR + 1) { in mcasp_set_clk_pdir()
206 for_each_set_bit(bit, &mcasp->pdir, PIN_BIT_AMUTE) { in mcasp_set_axr_pdir()
216 if (mcasp->rxnumevt) { /* enable FIFO */ in mcasp_start_rx()
217 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_start_rx()
249 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_start_rx()
256 if (mcasp->txnumevt) { /* enable FIFO */ in mcasp_start_tx()
257 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_start_tx()
287 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_start_tx()
292 mcasp->streams++; in davinci_mcasp_start()
304 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_stop_rx()
310 if (mcasp_is_synchronous(mcasp) && !mcasp->streams) { in mcasp_stop_rx()
318 if (mcasp->rxnumevt) { /* disable FIFO */ in mcasp_stop_rx()
319 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_stop_rx()
331 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_stop_tx()
337 if (mcasp_is_synchronous(mcasp) && mcasp->streams) in mcasp_stop_tx()
346 if (mcasp->txnumevt) { /* disable FIFO */ in mcasp_stop_tx()
347 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_stop_tx()
357 mcasp->streams--; in davinci_mcasp_stop()
365 static irqreturn_t davinci_mcasp_tx_irq_handler(int irq, void *data) in davinci_mcasp_tx_irq_handler() argument
367 struct davinci_mcasp *mcasp = (struct davinci_mcasp *)data; in davinci_mcasp_tx_irq_handler()
369 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
375 dev_warn(mcasp->dev, "Transmit buffer underflow\n"); in davinci_mcasp_tx_irq_handler()
378 substream = mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
384 dev_warn(mcasp->dev, "unhandled tx event. txstat: 0x%08x\n", in davinci_mcasp_tx_irq_handler()
396 static irqreturn_t davinci_mcasp_rx_irq_handler(int irq, void *data) in davinci_mcasp_rx_irq_handler() argument
398 struct davinci_mcasp *mcasp = (struct davinci_mcasp *)data; in davinci_mcasp_rx_irq_handler()
400 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
406 dev_warn(mcasp->dev, "Receive buffer overflow\n"); in davinci_mcasp_rx_irq_handler()
409 substream = mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
415 dev_warn(mcasp->dev, "unhandled rx event. rxstat: 0x%08x\n", in davinci_mcasp_rx_irq_handler()
427 static irqreturn_t davinci_mcasp_common_irq_handler(int irq, void *data) in davinci_mcasp_common_irq_handler() argument
429 struct davinci_mcasp *mcasp = (struct davinci_mcasp *)data; in davinci_mcasp_common_irq_handler()
432 if (mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]) in davinci_mcasp_common_irq_handler()
433 ret = davinci_mcasp_tx_irq_handler(irq, data); in davinci_mcasp_common_irq_handler()
435 if (mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]) in davinci_mcasp_common_irq_handler()
436 ret |= davinci_mcasp_rx_irq_handler(irq, data); in davinci_mcasp_common_irq_handler()
453 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_dai_fmt()
458 /* 1st data bit occur one ACLK cycle after the frame sync */ in davinci_mcasp_set_dai_fmt()
465 /* No delay after FS */ in davinci_mcasp_set_dai_fmt()
469 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
472 /* 1st data bit occur one ACLK cycle after the frame sync */ in davinci_mcasp_set_dai_fmt()
479 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
482 /* No delay after FS */ in davinci_mcasp_set_dai_fmt()
486 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
505 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
506 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
508 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
509 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
511 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
522 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
523 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
525 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
526 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
528 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
539 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
540 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
542 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
543 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
545 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
556 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
557 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
559 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
560 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
562 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
565 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
591 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
606 mcasp->dai_fmt = fmt; in davinci_mcasp_set_dai_fmt()
608 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_dai_fmt()
615 pm_runtime_get_sync(mcasp->dev); in __davinci_mcasp_set_clkdiv()
619 AHCLKXDIV(div - 1), AHCLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
621 AHCLKRDIV(div - 1), AHCLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
626 ACLKXDIV(div - 1), ACLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
628 ACLKRDIV(div - 1), ACLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
630 mcasp->bclk_div = div; in __davinci_mcasp_set_clkdiv()
635 * BCLK/LRCLK ratio descries how many bit-clock cycles in __davinci_mcasp_set_clkdiv()
637 * full period of data (for I2S format both left and in __davinci_mcasp_set_clkdiv()
639 * of tdm-slots (for I2S - divided by 2). in __davinci_mcasp_set_clkdiv()
642 * number of configured tdm slots. in __davinci_mcasp_set_clkdiv()
644 mcasp->slot_width = div / mcasp->tdm_slots; in __davinci_mcasp_set_clkdiv()
645 if (div % mcasp->tdm_slots) in __davinci_mcasp_set_clkdiv()
646 dev_warn(mcasp->dev, in __davinci_mcasp_set_clkdiv()
647 "%s(): BCLK/LRCLK %d is not divisible by %d tdm slots", in __davinci_mcasp_set_clkdiv()
648 __func__, div, mcasp->tdm_slots); in __davinci_mcasp_set_clkdiv()
652 return -EINVAL; in __davinci_mcasp_set_clkdiv()
655 pm_runtime_put(mcasp->dev); in __davinci_mcasp_set_clkdiv()
672 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_sysclk()
681 clear_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
688 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
691 dev_err(mcasp->dev, "Invalid clk id: %d\n", clk_id); in davinci_mcasp_set_sysclk()
698 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
702 * the same clock - coming via AUXCLK. in davinci_mcasp_set_sysclk()
704 mcasp->sysclk_freq = freq; in davinci_mcasp_set_sysclk()
706 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_sysclk()
714 struct snd_pcm_hw_constraint_list *cl = &mcasp->chconstr[stream]; in davinci_mcasp_ch_constraint()
715 unsigned int *list = (unsigned int *) cl->list; in davinci_mcasp_ch_constraint()
716 int slots = mcasp->tdm_slots; in davinci_mcasp_ch_constraint()
719 if (mcasp->tdm_mask[stream]) in davinci_mcasp_ch_constraint()
720 slots = hweight32(mcasp->tdm_mask[stream]); in davinci_mcasp_ch_constraint()
728 cl->count = count; in davinci_mcasp_ch_constraint()
737 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_set_ch_constraints()
738 if (mcasp->serial_dir[i] == TX_MODE) in davinci_mcasp_set_ch_constraints()
740 else if (mcasp->serial_dir[i] == RX_MODE) in davinci_mcasp_set_ch_constraints()
762 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_set_tdm_slot()
765 dev_dbg(mcasp->dev, in davinci_mcasp_set_tdm_slot()
770 dev_err(mcasp->dev, in davinci_mcasp_set_tdm_slot()
771 "Bad tdm mask tx: 0x%08x rx: 0x%08x slots %d\n", in davinci_mcasp_set_tdm_slot()
773 return -EINVAL; in davinci_mcasp_set_tdm_slot()
778 dev_err(mcasp->dev, "%s: Unsupported slot_width %d\n", in davinci_mcasp_set_tdm_slot()
780 return -EINVAL; in davinci_mcasp_set_tdm_slot()
783 mcasp->tdm_slots = slots; in davinci_mcasp_set_tdm_slot()
784 mcasp->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = tx_mask; in davinci_mcasp_set_tdm_slot()
785 mcasp->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = rx_mask; in davinci_mcasp_set_tdm_slot()
786 mcasp->slot_width = slot_width; in davinci_mcasp_set_tdm_slot()
796 u32 mask = (1ULL << sample_width) - 1; in davinci_config_channel_size()
798 if (mcasp->slot_width) in davinci_config_channel_size()
799 slot_width = mcasp->slot_width; in davinci_config_channel_size()
800 else if (mcasp->max_format_width) in davinci_config_channel_size()
801 slot_width = mcasp->max_format_width; in davinci_config_channel_size()
811 * left aligned formats: rotate w/ (slot_width - sample_width) in davinci_config_channel_size()
813 if ((mcasp->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in davinci_config_channel_size()
819 rx_rotate = (slot_width - sample_width) / 4; in davinci_config_channel_size()
822 /* mapping of the XSSZ bit-field as described in the datasheet */ in davinci_config_channel_size()
823 fmt = (slot_width >> 1) - 1; in davinci_config_channel_size()
825 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_config_channel_size()
838 * 16 bit to 23-8 (TXROT=6, rotate 24 bits) in davinci_config_channel_size()
839 * 24 bit to 23-0 (TXROT=0, rotate 0 bits) in davinci_config_channel_size()
859 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream]; in mcasp_common_hw_param()
863 u8 slots = mcasp->tdm_slots; in mcasp_common_hw_param()
869 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in mcasp_common_hw_param()
875 if (mcasp->version < MCASP_VERSION_3) in mcasp_common_hw_param()
883 mcasp->active_serializers[SNDRV_PCM_STREAM_CAPTURE]; in mcasp_common_hw_param()
888 mcasp->active_serializers[SNDRV_PCM_STREAM_PLAYBACK]; in mcasp_common_hw_param()
892 for (i = 0; i < mcasp->num_serializer; i++) { in mcasp_common_hw_param()
894 mcasp->serial_dir[i]); in mcasp_common_hw_param()
895 if (mcasp->serial_dir[i] == TX_MODE && in mcasp_common_hw_param()
898 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
899 set_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
901 } else if (mcasp->serial_dir[i] == RX_MODE && in mcasp_common_hw_param()
903 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
910 if (mcasp->serial_dir[i] != INACTIVE_MODE) in mcasp_common_hw_param()
913 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
914 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
920 numevt = mcasp->txnumevt; in mcasp_common_hw_param()
921 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_common_hw_param()
924 numevt = mcasp->rxnumevt; in mcasp_common_hw_param()
925 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_common_hw_param()
929 dev_warn(mcasp->dev, "stream has more channels (%d) than are " in mcasp_common_hw_param()
932 return -EINVAL; in mcasp_common_hw_param()
941 * DMA request to provide data for all serializers. in mcasp_common_hw_param()
945 dma_data->maxburst = active_serializers; in mcasp_common_hw_param()
947 dma_data->maxburst = 0; in mcasp_common_hw_param()
954 dev_err(mcasp->dev, "Invalid combination of period words and " in mcasp_common_hw_param()
957 return -EINVAL; in mcasp_common_hw_param()
968 numevt -= active_serializers; in mcasp_common_hw_param()
978 dma_data->maxburst = numevt; in mcasp_common_hw_param()
981 mcasp->active_serializers[stream] = active_serializers; in mcasp_common_hw_param()
995 total_slots = mcasp->tdm_slots; in mcasp_i2s_hw_param()
1003 if (mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1004 active_slots = hweight32(mcasp->tdm_mask[stream]); in mcasp_i2s_hw_param()
1009 if ((1 << i) & mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1011 if (--active_slots <= 0) in mcasp_i2s_hw_param()
1028 if (!mcasp->dat_port) in mcasp_i2s_hw_param()
1046 if (mcasp_is_synchronous(mcasp) && !mcasp->channels) in mcasp_i2s_hw_param()
1058 u8 *cs_bytes = (u8 *)&mcasp->iec958_status; in mcasp_dit_hw_param()
1060 if (!mcasp->dat_port) in mcasp_dit_hw_param()
1070 /* Set the TX tdm : for all the slots */ in mcasp_dit_hw_param()
1109 dev_err(mcasp->dev, "unsupported sampling rate: %d\n", rate); in mcasp_dit_hw_param()
1110 return -EINVAL; in mcasp_dit_hw_param()
1113 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1114 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1142 dev_warn(mcasp->dev, "Too fast reference clock (%u)\n", in davinci_mcasp_calc_clk_div()
1149 ((sysclk_freq / div) - bclk_freq) > in davinci_mcasp_calc_clk_div()
1150 (bclk_freq - (sysclk_freq / (div+1)))) { in davinci_mcasp_calc_clk_div()
1152 rem = rem - bclk_freq; in davinci_mcasp_calc_clk_div()
1156 (int)bclk_freq)) / div - 1000000; in davinci_mcasp_calc_clk_div()
1160 dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n", in davinci_mcasp_calc_clk_div()
1174 if (!mcasp->txnumevt) in davinci_mcasp_tx_delay()
1177 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_WFIFOSTS_OFFSET); in davinci_mcasp_tx_delay()
1182 if (!mcasp->rxnumevt) in davinci_mcasp_rx_delay()
1185 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_RFIFOSTS_OFFSET); in davinci_mcasp_rx_delay()
1195 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_delay()
1205 return fifo_use / substream->runtime->channels; in davinci_mcasp_delay()
1245 printk(KERN_WARNING "davinci-mcasp: unsupported PCM format"); in davinci_mcasp_hw_params()
1246 return -EINVAL; in davinci_mcasp_hw_params()
1249 ret = davinci_mcasp_set_dai_fmt(cpu_dai, mcasp->dai_fmt); in davinci_mcasp_hw_params()
1257 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_hw_params()
1258 int slots = mcasp->tdm_slots; in davinci_mcasp_hw_params()
1263 if (mcasp->slot_width) in davinci_mcasp_hw_params()
1264 sbits = mcasp->slot_width; in davinci_mcasp_hw_params()
1266 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_hw_params()
1271 davinci_mcasp_calc_clk_div(mcasp, mcasp->sysclk_freq, in davinci_mcasp_hw_params()
1275 ret = mcasp_common_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1280 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_hw_params()
1283 ret = mcasp_i2s_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1291 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_hw_params()
1292 mcasp->channels = channels; in davinci_mcasp_hw_params()
1293 if (!mcasp->max_format_width) in davinci_mcasp_hw_params()
1294 mcasp->max_format_width = word_length; in davinci_mcasp_hw_params()
1310 davinci_mcasp_start(mcasp, substream->stream); in davinci_mcasp_trigger()
1315 davinci_mcasp_stop(mcasp, substream->stream); in davinci_mcasp_trigger()
1319 ret = -EINVAL; in davinci_mcasp_trigger()
1328 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_slot_width()
1335 slot_width = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_slot_width()
1351 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format_width()
1358 format_width = rd->mcasp->max_format_width; in davinci_mcasp_hw_rule_format_width()
1381 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_rate()
1385 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_rate()
1389 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_rate()
1390 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_rate()
1402 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_rate()
1404 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_rate()
1406 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_rate()
1408 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_rate()
1420 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_rate()
1421 "Frequencies %d-%d -> %d-%d for %d sbits and %d tdm slots\n", in davinci_mcasp_hw_rule_rate()
1422 ri->min, ri->max, range.min, range.max, sbits, slots); in davinci_mcasp_hw_rule_rate()
1424 return snd_interval_refine(hw_param_interval(params, rule->var), in davinci_mcasp_hw_rule_rate()
1431 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format()
1435 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_format()
1447 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_format()
1449 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_format()
1451 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_format()
1453 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_format()
1454 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_format()
1456 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_format()
1465 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_format()
1466 "%d possible sample format for %d Hz and %d tdm slots\n", in davinci_mcasp_hw_rule_format()
1477 u8 numevt = *((u8 *)rule->private); in davinci_mcasp_hw_rule_min_periodsize()
1492 &mcasp->ruledata[substream->stream]; in davinci_mcasp_startup()
1495 int tdm_slots = mcasp->tdm_slots; in davinci_mcasp_startup()
1499 if (mcasp->substreams[substream->stream]) in davinci_mcasp_startup()
1500 return -EBUSY; in davinci_mcasp_startup()
1502 mcasp->substreams[substream->stream] = substream; in davinci_mcasp_startup()
1504 if (mcasp->tdm_mask[substream->stream]) in davinci_mcasp_startup()
1505 tdm_slots = hweight32(mcasp->tdm_mask[substream->stream]); in davinci_mcasp_startup()
1507 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_startup()
1512 * number of serializers for the direction * tdm slots per serializer in davinci_mcasp_startup()
1514 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_startup()
1519 for (i = 0; i < mcasp->num_serializer; i++) { in davinci_mcasp_startup()
1520 if (mcasp->serial_dir[i] == dir) in davinci_mcasp_startup()
1523 ruledata->serializers = max_channels; in davinci_mcasp_startup()
1524 ruledata->mcasp = mcasp; in davinci_mcasp_startup()
1533 if (mcasp->channels && mcasp->channels < max_channels && in davinci_mcasp_startup()
1534 ruledata->serializers == 1) in davinci_mcasp_startup()
1535 max_channels = mcasp->channels; in davinci_mcasp_startup()
1543 snd_pcm_hw_constraint_minmax(substream->runtime, in davinci_mcasp_startup()
1547 snd_pcm_hw_constraint_list(substream->runtime, in davinci_mcasp_startup()
1549 &mcasp->chconstr[substream->stream]); in davinci_mcasp_startup()
1551 if (mcasp->max_format_width) { in davinci_mcasp_startup()
1556 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1560 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1564 else if (mcasp->slot_width) { in davinci_mcasp_startup()
1566 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1570 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1579 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_startup()
1580 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1584 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1587 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1591 SNDRV_PCM_HW_PARAM_RATE, -1); in davinci_mcasp_startup()
1596 numevt = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? in davinci_mcasp_startup()
1597 &mcasp->txnumevt : in davinci_mcasp_startup()
1598 &mcasp->rxnumevt; in davinci_mcasp_startup()
1599 snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1602 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, -1); in davinci_mcasp_startup()
1612 mcasp->substreams[substream->stream] = NULL; in davinci_mcasp_shutdown()
1613 mcasp->active_serializers[substream->stream] = 0; in davinci_mcasp_shutdown()
1615 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_shutdown()
1619 mcasp->channels = 0; in davinci_mcasp_shutdown()
1620 mcasp->max_format_width = 0; in davinci_mcasp_shutdown()
1627 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; in davinci_mcasp_iec958_info()
1628 uinfo->count = 1; in davinci_mcasp_iec958_info()
1639 memcpy(uctl->value.iec958.status, &mcasp->iec958_status, in davinci_mcasp_iec958_get()
1640 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_get()
1651 memcpy(&mcasp->iec958_status, uctl->value.iec958.status, in davinci_mcasp_iec958_put()
1652 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_put()
1663 memset(ucontrol->value.iec958.status, 0xff, sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_con_mask_get()
1687 unsigned char *cs = (u8 *)&mcasp->iec958_status; in davinci_mcasp_init_iec958_status()
1701 snd_soc_dai_dma_data_set(dai, stream, &mcasp->dma_data[stream]); in davinci_mcasp_dai_probe()
1703 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_dai_probe()
1717 .delay = davinci_mcasp_delay,
1740 .name = "davinci-mcasp.0",
1760 .name = "davinci-mcasp.1",
1775 .name = "davinci-mcasp",
1813 .compatible = "ti,dm646x-mcasp-audio",
1814 .data = &dm646x_mcasp_pdata,
1817 .compatible = "ti,da830-mcasp-audio",
1818 .data = &da830_mcasp_pdata,
1821 .compatible = "ti,am33xx-mcasp-audio",
1822 .data = &am33xx_mcasp_pdata,
1825 .compatible = "ti,dra7-mcasp-audio",
1826 .data = &dra7_mcasp_pdata,
1829 .compatible = "ti,omap4-mcasp-audio",
1830 .data = &omap_mcasp_pdata,
1838 struct device_node *node = pdev->dev.of_node; in mcasp_reparent_fck()
1850 dev_warn(&pdev->dev, "Update the bindings to use assigned-clocks!\n"); in mcasp_reparent_fck()
1852 gfclk = clk_get(&pdev->dev, "fck"); in mcasp_reparent_fck()
1854 dev_err(&pdev->dev, "failed to get fck\n"); in mcasp_reparent_fck()
1860 dev_err(&pdev->dev, "failed to get parent clock\n"); in mcasp_reparent_fck()
1867 dev_err(&pdev->dev, "failed to reparent fck\n"); in mcasp_reparent_fck()
1881 return of_property_read_bool(mcasp->dev->of_node, "gpio-controller"); in davinci_mcasp_have_gpiochip()
1890 const struct of_device_id *match = of_match_device(mcasp_dt_ids, &pdev->dev); in davinci_mcasp_get_config()
1891 struct device_node *np = pdev->dev.of_node; in davinci_mcasp_get_config()
1897 if (pdev->dev.platform_data) { in davinci_mcasp_get_config()
1898 pdata = pdev->dev.platform_data; in davinci_mcasp_get_config()
1899 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1902 pdata = devm_kmemdup(&pdev->dev, match->data, sizeof(*pdata), in davinci_mcasp_get_config()
1905 return -ENOMEM; in davinci_mcasp_get_config()
1907 dev_err(&pdev->dev, "No compatible match found\n"); in davinci_mcasp_get_config()
1908 return -EINVAL; in davinci_mcasp_get_config()
1911 if (of_property_read_u32(np, "op-mode", &val) == 0) { in davinci_mcasp_get_config()
1912 pdata->op_mode = val; in davinci_mcasp_get_config()
1914 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1918 if (of_property_read_u32(np, "tdm-slots", &val) == 0) { in davinci_mcasp_get_config()
1920 dev_err(&pdev->dev, "tdm-slots must be in rage [2-32]\n"); in davinci_mcasp_get_config()
1921 return -EINVAL; in davinci_mcasp_get_config()
1924 pdata->tdm_slots = val; in davinci_mcasp_get_config()
1925 } else if (pdata->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1926 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1930 of_serial_dir32 = of_get_property(np, "serial-dir", &val); in davinci_mcasp_get_config()
1933 u8 *of_serial_dir = devm_kzalloc(&pdev->dev, in davinci_mcasp_get_config()
1937 return -ENOMEM; in davinci_mcasp_get_config()
1942 pdata->num_serializer = val; in davinci_mcasp_get_config()
1943 pdata->serial_dir = of_serial_dir; in davinci_mcasp_get_config()
1945 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1949 if (of_property_read_u32(np, "tx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1950 pdata->txnumevt = val; in davinci_mcasp_get_config()
1952 if (of_property_read_u32(np, "rx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1953 pdata->rxnumevt = val; in davinci_mcasp_get_config()
1955 if (of_property_read_u32(np, "auxclk-fs-ratio", &val) == 0) in davinci_mcasp_get_config()
1956 mcasp->auxclk_fs_ratio = val; in davinci_mcasp_get_config()
1960 pdata->dismod = DISMOD_VAL(val); in davinci_mcasp_get_config()
1962 dev_warn(&pdev->dev, "Invalid dismod value: %u\n", val); in davinci_mcasp_get_config()
1963 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1966 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1970 mcasp->pdata = pdata; in davinci_mcasp_get_config()
1972 if (mcasp->missing_audio_param) { in davinci_mcasp_get_config()
1974 dev_dbg(&pdev->dev, "Missing DT parameter(s) for audio\n"); in davinci_mcasp_get_config()
1978 dev_err(&pdev->dev, "Insufficient DT parameter(s)\n"); in davinci_mcasp_get_config()
1979 return -ENODEV; in davinci_mcasp_get_config()
1982 mcasp->op_mode = pdata->op_mode; in davinci_mcasp_get_config()
1983 /* sanity check for tdm slots parameter */ in davinci_mcasp_get_config()
1984 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1985 if (pdata->tdm_slots < 2) { in davinci_mcasp_get_config()
1986 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1987 pdata->tdm_slots); in davinci_mcasp_get_config()
1988 mcasp->tdm_slots = 2; in davinci_mcasp_get_config()
1989 } else if (pdata->tdm_slots > 32) { in davinci_mcasp_get_config()
1990 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1991 pdata->tdm_slots); in davinci_mcasp_get_config()
1992 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
1994 mcasp->tdm_slots = pdata->tdm_slots; in davinci_mcasp_get_config()
1997 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
2000 mcasp->num_serializer = pdata->num_serializer; in davinci_mcasp_get_config()
2002 mcasp->context.xrsr_regs = devm_kcalloc(&pdev->dev, in davinci_mcasp_get_config()
2003 mcasp->num_serializer, sizeof(u32), in davinci_mcasp_get_config()
2005 if (!mcasp->context.xrsr_regs) in davinci_mcasp_get_config()
2006 return -ENOMEM; in davinci_mcasp_get_config()
2008 mcasp->serial_dir = pdata->serial_dir; in davinci_mcasp_get_config()
2009 mcasp->version = pdata->version; in davinci_mcasp_get_config()
2010 mcasp->txnumevt = pdata->txnumevt; in davinci_mcasp_get_config()
2011 mcasp->rxnumevt = pdata->rxnumevt; in davinci_mcasp_get_config()
2012 mcasp->dismod = pdata->dismod; in davinci_mcasp_get_config()
2030 if (!mcasp->dev->of_node) in davinci_mcasp_get_dma_type()
2033 tmp = mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data; in davinci_mcasp_get_dma_type()
2034 chan = dma_request_chan(mcasp->dev, tmp); in davinci_mcasp_get_dma_type()
2036 return dev_err_probe(mcasp->dev, PTR_ERR(chan), in davinci_mcasp_get_dma_type()
2038 if (WARN_ON(!chan->device || !chan->device->dev)) { in davinci_mcasp_get_dma_type()
2040 return -EINVAL; in davinci_mcasp_get_dma_type()
2043 if (chan->device->dev->of_node) in davinci_mcasp_get_dma_type()
2044 ret = of_property_read_string(chan->device->dev->of_node, in davinci_mcasp_get_dma_type()
2047 dev_dbg(mcasp->dev, "DMA controller has no of-node\n"); in davinci_mcasp_get_dma_type()
2053 dev_dbg(mcasp->dev, "DMA controller compatible = \"%s\"\n", tmp); in davinci_mcasp_get_dma_type()
2069 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_txdma_offset()
2070 return pdata->tx_dma_offset; in davinci_mcasp_txdma_offset()
2072 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_txdma_offset()
2073 if (pdata->serial_dir[i] == TX_MODE) { in davinci_mcasp_txdma_offset()
2092 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_rxdma_offset()
2093 return pdata->rx_dma_offset; in davinci_mcasp_rxdma_offset()
2095 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_rxdma_offset()
2096 if (pdata->serial_dir[i] == RX_MODE) { in davinci_mcasp_rxdma_offset()
2115 if (mcasp->num_serializer && offset < mcasp->num_serializer && in davinci_mcasp_gpio_request()
2116 mcasp->serial_dir[offset] != INACTIVE_MODE) { in davinci_mcasp_gpio_request()
2117 dev_err(mcasp->dev, "AXR%u pin is used for audio\n", offset); in davinci_mcasp_gpio_request()
2118 return -EBUSY; in davinci_mcasp_gpio_request()
2122 return pm_runtime_resume_and_get(mcasp->dev); in davinci_mcasp_gpio_request()
2135 pm_runtime_put_sync(mcasp->dev); in davinci_mcasp_gpio_free()
2224 .base = -1,
2233 mcasp->gpio_chip = davinci_mcasp_template_chip; in davinci_mcasp_init_gpiochip()
2234 mcasp->gpio_chip.label = dev_name(mcasp->dev); in davinci_mcasp_init_gpiochip()
2235 mcasp->gpio_chip.parent = mcasp->dev; in davinci_mcasp_init_gpiochip()
2237 return devm_gpiochip_add_data(mcasp->dev, &mcasp->gpio_chip, mcasp); in davinci_mcasp_init_gpiochip()
2256 if (!pdev->dev.platform_data && !pdev->dev.of_node) { in davinci_mcasp_probe()
2257 dev_err(&pdev->dev, "No platform data supplied\n"); in davinci_mcasp_probe()
2258 return -EINVAL; in davinci_mcasp_probe()
2261 mcasp = devm_kzalloc(&pdev->dev, sizeof(struct davinci_mcasp), in davinci_mcasp_probe()
2264 return -ENOMEM; in davinci_mcasp_probe()
2268 dev_warn(&pdev->dev, in davinci_mcasp_probe()
2272 dev_err(&pdev->dev, "no mem resource?\n"); in davinci_mcasp_probe()
2273 return -ENODEV; in davinci_mcasp_probe()
2277 mcasp->base = devm_ioremap_resource(&pdev->dev, mem); in davinci_mcasp_probe()
2278 if (IS_ERR(mcasp->base)) in davinci_mcasp_probe()
2279 return PTR_ERR(mcasp->base); in davinci_mcasp_probe()
2281 dev_set_drvdata(&pdev->dev, mcasp); in davinci_mcasp_probe()
2282 pm_runtime_enable(&pdev->dev); in davinci_mcasp_probe()
2284 mcasp->dev = &pdev->dev; in davinci_mcasp_probe()
2290 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_probe()
2292 pm_runtime_put(mcasp->dev); in davinci_mcasp_probe()
2295 if (mcasp->missing_audio_param) in davinci_mcasp_probe()
2300 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common", in davinci_mcasp_probe()
2301 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2303 ret = -ENOMEM; in davinci_mcasp_probe()
2306 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2311 dev_err(&pdev->dev, "common IRQ request failed\n"); in davinci_mcasp_probe()
2315 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2316 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2321 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx", in davinci_mcasp_probe()
2322 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2324 ret = -ENOMEM; in davinci_mcasp_probe()
2327 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2331 dev_err(&pdev->dev, "RX IRQ request failed\n"); in davinci_mcasp_probe()
2335 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2340 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx", in davinci_mcasp_probe()
2341 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2343 ret = -ENOMEM; in davinci_mcasp_probe()
2346 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2350 dev_err(&pdev->dev, "TX IRQ request failed\n"); in davinci_mcasp_probe()
2354 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2359 mcasp->dat_port = true; in davinci_mcasp_probe()
2361 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_probe()
2362 dma_data->filter_data = "tx"; in davinci_mcasp_probe()
2364 dma_data->addr = dat->start; in davinci_mcasp_probe()
2369 if (mcasp->version == MCASP_VERSION_OMAP) in davinci_mcasp_probe()
2370 dma_data->addr += davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2372 dma_data->addr = mem->start + davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2377 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_probe()
2378 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_probe()
2379 dma_data->filter_data = "rx"; in davinci_mcasp_probe()
2381 dma_data->addr = dat->start; in davinci_mcasp_probe()
2383 dma_data->addr = in davinci_mcasp_probe()
2384 mem->start + davinci_mcasp_rxdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2387 if (mcasp->version < MCASP_VERSION_3) { in davinci_mcasp_probe()
2388 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; in davinci_mcasp_probe()
2389 /* dma_params->dma_addr is pointing to the data port address */ in davinci_mcasp_probe()
2390 mcasp->dat_port = true; in davinci_mcasp_probe()
2392 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; in davinci_mcasp_probe()
2396 * scenarios. Maximum number tdm slots is 32 and there cannot in davinci_mcasp_probe()
2402 mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list = in davinci_mcasp_probe()
2403 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2404 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2408 mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list = in davinci_mcasp_probe()
2409 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2410 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2414 if (!mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list || in davinci_mcasp_probe()
2415 !mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list) { in davinci_mcasp_probe()
2416 ret = -ENOMEM; in davinci_mcasp_probe()
2429 ret = edma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2432 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_probe()
2433 ret = sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); in davinci_mcasp_probe()
2435 ret = sdma_pcm_platform_register(&pdev->dev, "tx", NULL); in davinci_mcasp_probe()
2438 ret = udma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2441 dev_err(&pdev->dev, "No DMA controller found (%d)\n", ret); in davinci_mcasp_probe()
2443 case -EPROBE_DEFER: in davinci_mcasp_probe()
2448 dev_err(&pdev->dev, "register PCM failed: %d\n", ret); in davinci_mcasp_probe()
2452 ret = devm_snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, in davinci_mcasp_probe()
2453 &davinci_mcasp_dai[mcasp->op_mode], 1); in davinci_mcasp_probe()
2461 dev_err(&pdev->dev, "gpiochip registration failed: %d\n", ret); in davinci_mcasp_probe()
2467 pm_runtime_disable(&pdev->dev); in davinci_mcasp_probe()
2473 pm_runtime_disable(&pdev->dev); in davinci_mcasp_remove()
2480 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_suspend()
2485 context->config_regs[i] = mcasp_get_reg(mcasp, context_regs[i]); in davinci_mcasp_runtime_suspend()
2487 if (mcasp->txnumevt) { in davinci_mcasp_runtime_suspend()
2488 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2489 context->afifo_regs[0] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2491 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_suspend()
2492 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2493 context->afifo_regs[1] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2496 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_suspend()
2497 context->xrsr_regs[i] = mcasp_get_reg(mcasp, in davinci_mcasp_runtime_suspend()
2506 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_resume()
2511 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]); in davinci_mcasp_runtime_resume()
2513 if (mcasp->txnumevt) { in davinci_mcasp_runtime_resume()
2514 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2515 mcasp_set_reg(mcasp, reg, context->afifo_regs[0]); in davinci_mcasp_runtime_resume()
2517 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_resume()
2518 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2519 mcasp_set_reg(mcasp, reg, context->afifo_regs[1]); in davinci_mcasp_runtime_resume()
2522 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_resume()
2524 context->xrsr_regs[i]); in davinci_mcasp_runtime_resume()
2541 .name = "davinci-mcasp",