Lines Matching refs:TEGRA210_MBDRC_CFG
43 { TEGRA210_MBDRC_CFG, 0x0030de51},
493 SOC_ENUM_SINGLE(TEGRA210_MBDRC_CFG, TEGRA210_MBDRC_CFG_MBDRC_MODE_SHIFT,
501 SOC_ENUM_SINGLE(TEGRA210_MBDRC_CFG, TEGRA210_MBDRC_CFG_PEAK_RMS_SHIFT,
509 SOC_ENUM_SINGLE(TEGRA210_MBDRC_CFG,
518 SOC_ENUM_SINGLE(TEGRA210_MBDRC_CFG, TEGRA210_MBDRC_CFG_FRAME_SIZE_SHIFT,
547 SOC_SINGLE_EXT("MBDRC RMS Offset", TEGRA210_MBDRC_CFG,
551 SOC_SINGLE_EXT("MBDRC Shift Control", TEGRA210_MBDRC_CFG,
696 case TEGRA210_MBDRC_CFG ... TEGRA210_MBDRC_CFG_RAM_DATA: in tegra210_mbdrc_wr_reg()
776 regmap_read(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, &val); in tegra210_mbdrc_hw_params()
808 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()
812 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()
816 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()
820 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()
825 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()
829 regmap_update_bits(ope->mbdrc_regmap, TEGRA210_MBDRC_CFG, in tegra210_mbdrc_component_init()