Lines Matching refs:SUN4I_I2S_FMT0_REG
34 #define SUN4I_I2S_FMT0_REG 0x04 macro
519 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun8i_i2s_set_chan_cfg()
580 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun50i_h6_i2s_set_chan_cfg()
680 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun4i_i2s_set_soc_fmt()
703 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun4i_i2s_set_soc_fmt()
802 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun8i_i2s_set_soc_fmt()
910 regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, in sun50i_h6_i2s_set_soc_fmt()
1202 { SUN4I_I2S_FMT0_REG, 0x0000000c },
1215 { SUN4I_I2S_FMT0_REG, 0x00000033 },
1229 { SUN4I_I2S_FMT0_REG, 0x00000033 },
1351 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
1352 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
1369 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
1370 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
1392 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
1393 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
1410 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 2),
1411 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 6),
1428 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
1429 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
1446 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 2),
1447 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 6),
1464 .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 2),
1465 .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 6),