186 static int stm32_sai_sub_reg_up(struct stm32_sai_sub_data *sai,  in stm32_sai_sub_reg_up()  function
347 	ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, mask, cr1);  in stm32_sai_set_clk_div()
424 	return stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_mclk_enable()
435 	stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, SAI_XCR1_MCKEN, 0);  in stm32_sai_mclk_disable()
555 		ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_set_sysclk()
635 	stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX, slotr_mask, slotr);  in stm32_sai_set_dai_tdm_slot()
717 	stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr);  in stm32_sai_set_dai_fmt()
745 	ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);  in stm32_sai_set_dai_fmt()
797 	stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX,  in stm32_sai_startup()
847 	ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);  in stm32_sai_set_config()
883 	stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX,  in stm32_sai_set_slots()
890 		stm32_sai_sub_reg_up(sai,  in stm32_sai_set_slots()
922 	stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr);  in stm32_sai_set_frame()
927 		stm32_sai_sub_reg_up(sai, STM_SAI_SLOTR_REGX,  in stm32_sai_set_frame()
1046 				stm32_sai_sub_reg_up(sai,  in stm32_sai_configure_clock()
1110 		stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_trigger()
1114 		ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_trigger()
1124 		stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX,  in stm32_sai_trigger()
1127 		stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_trigger()
1131 		ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX,  in stm32_sai_trigger()
1153 	stm32_sai_sub_reg_up(sai, STM_SAI_IMR_REGX, SAI_XIMR_MASK, 0);  in stm32_sai_shutdown()
1221 	return stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1);  in stm32_sai_dai_probe()