Lines Matching refs:sd_offset

137 	int sd_offset = SOF_HDA_ADSP_LOADER_BASE;  in cl_skl_cldma_stream_run()  local
143 sd_offset + SOF_HDA_ADSP_REG_SD_CTL, in cl_skl_cldma_stream_run()
152 sd_offset + SOF_HDA_ADSP_REG_SD_CTL); in cl_skl_cldma_stream_run()
167 int sd_offset = SOF_HDA_ADSP_LOADER_BASE; in cl_skl_cldma_stream_clear() local
176 sd_offset + SOF_HDA_ADSP_REG_SD_CTL, in cl_skl_cldma_stream_clear()
179 sd_offset + SOF_HDA_ADSP_REG_SD_CTL, in cl_skl_cldma_stream_clear()
183 sd_offset + SOF_HDA_ADSP_REG_SD_BDLPL, HDA_CL_SD_BDLPLBA(0)); in cl_skl_cldma_stream_clear()
185 sd_offset + SOF_HDA_ADSP_REG_SD_BDLPU, 0); in cl_skl_cldma_stream_clear()
189 sd_offset + SOF_HDA_ADSP_REG_SD_CBL, 0); in cl_skl_cldma_stream_clear()
192 sd_offset + SOF_HDA_ADSP_REG_SD_LVI, 0); in cl_skl_cldma_stream_clear()
198 int sd_offset = SOF_DSP_REG_CL_SPBFIFO; in cl_skl_cldma_setup_spb() local
202 sd_offset + SOF_HDA_ADSP_REG_CL_SPBFIFO_SPBFCCTL, in cl_skl_cldma_setup_spb()
207 sd_offset + SOF_HDA_ADSP_REG_CL_SPBFIFO_SPIB, size); in cl_skl_cldma_setup_spb()
220 int sd_offset = SOF_DSP_REG_CL_SPBFIFO; in cl_skl_cldma_cleanup_spb() local
223 sd_offset + SOF_HDA_ADSP_REG_CL_SPBFIFO_SPBFCCTL, in cl_skl_cldma_cleanup_spb()
228 sd_offset + SOF_HDA_ADSP_REG_CL_SPBFIFO_SPIB, 0); in cl_skl_cldma_cleanup_spb()
235 int sd_offset = SOF_HDA_ADSP_LOADER_BASE; in cl_skl_cldma_setup_controller() local
242 sd_offset + SOF_HDA_ADSP_REG_SD_BDLPL, in cl_skl_cldma_setup_controller()
245 sd_offset + SOF_HDA_ADSP_REG_SD_BDLPU, in cl_skl_cldma_setup_controller()
250 sd_offset + SOF_HDA_ADSP_REG_SD_CBL, max_size); in cl_skl_cldma_setup_controller()
253 sd_offset + SOF_HDA_ADSP_REG_SD_LVI, count - 1); in cl_skl_cldma_setup_controller()
259 sd_offset + SOF_HDA_ADSP_REG_SD_CTL, in cl_skl_cldma_setup_controller()
262 sd_offset + SOF_HDA_ADSP_REG_SD_CTL, in cl_skl_cldma_setup_controller()
423 int sd_offset = SOF_HDA_ADSP_LOADER_BASE; in cl_skl_cldma_wait_interruptible() local
441 sd_offset + SOF_HDA_ADSP_REG_SD_STS); in cl_skl_cldma_wait_interruptible()