Lines Matching +full:0 +full:xff300000

31 #define TRCM_TXRX 0
105 * Returns success (0) or negative errno.
109 int ret = 0; in i2s_tdm_prepare_enable_mclk()
118 return 0; in i2s_tdm_prepare_enable_mclk()
135 return 0; in i2s_tdm_runtime_suspend()
158 return 0; in i2s_tdm_runtime_resume()
175 * when clk_trcm > 0.
216 unsigned int xfer_mask = 0; in rockchip_snd_xfer_clear()
217 unsigned int xfer_val = 0; in rockchip_snd_xfer_clear()
283 /* only used when clk_trcm > 0 */
311 if (--i2s_tdm->refcount == 0) { in rockchip_snd_txrxctrl()
358 if (ret < 0 && ret != -EACCES) in rockchip_i2s_tdm_set_fmt()
451 tdm_val = TDM_SHIFT_CTRL(0); in rockchip_i2s_tdm_set_fmt()
455 tdm_val = TDM_SHIFT_CTRL(0); in rockchip_i2s_tdm_set_fmt()
551 unsigned int val = 0; in rockchip_i2s_io_multiplex()
554 return 0; in rockchip_i2s_io_multiplex()
608 return 0; in rockchip_i2s_io_multiplex()
621 return 0; in rockchip_i2s_trcm_mode()
647 return 0; in rockchip_i2s_trcm_mode()
655 unsigned int val = 0; in rockchip_i2s_tdm_hw_params()
769 rockchip_snd_txrxctrl(substream, dai, 0); in rockchip_i2s_tdm_trigger()
771 rockchip_snd_rxctrl(i2s_tdm, 0); in rockchip_i2s_tdm_trigger()
773 rockchip_snd_txctrl(i2s_tdm, 0); in rockchip_i2s_tdm_trigger()
779 return 0; in rockchip_i2s_tdm_trigger()
791 return 0; in rockchip_i2s_tdm_dai_probe()
811 return 0; in rockchip_dai_tdm_slot()
824 return 0; in rockchip_i2s_tdm_set_bclk_ratio()
908 {0x00, 0x7200000f},
909 {0x04, 0x01c8000f},
910 {0x08, 0x00001f1f},
911 {0x10, 0x001f0000},
912 {0x14, 0x01f00000},
913 {0x30, 0x00003eff},
914 {0x34, 0x00003eff},
915 {0x38, 0x00000707},
936 u32 reg = 0, val = 0, trcm = i2s_tdm->clk_trcm; in common_soc_init()
940 return 0; in common_soc_init()
948 for (i = 0; i < i2s_tdm->soc_data->config_count; i++) { in common_soc_init()
961 return 0; in common_soc_init()
965 { 0xff060000, 0x184, PX30_I2S0_CLK_TXONLY, PX30_I2S0_CLK_RXONLY },
969 { 0xff7e0000, 0x190, RK1808_I2S0_CLK_TXONLY, RK1808_I2S0_CLK_RXONLY },
973 { 0xff300000, 0x308, RK3308_I2S0_CLK_TXONLY, RK3308_I2S0_CLK_RXONLY },
974 { 0xff310000, 0x308, RK3308_I2S1_CLK_TXONLY, RK3308_I2S1_CLK_RXONLY },
978 { 0xfe410000, 0x504, RK3568_I2S1_CLK_TXONLY, RK3568_I2S1_CLK_RXONLY },
979 { 0xfe410000, 0x508, RK3568_I2S1_MCLK_TX_OE, RK3568_I2S1_MCLK_RX_OE },
980 { 0xfe420000, 0x508, RK3568_I2S2_MCLK_OE, RK3568_I2S2_MCLK_OE },
981 { 0xfe430000, 0x504, RK3568_I2S3_CLK_TXONLY, RK3568_I2S3_CLK_RXONLY },
982 { 0xfe430000, 0x508, RK3568_I2S3_MCLK_TXONLY, RK3568_I2S3_MCLK_RXONLY },
983 { 0xfe430000, 0x508, RK3568_I2S3_MCLK_OE, RK3568_I2S3_MCLK_OE },
987 { 0xff800000, 0x10260, RV1126_I2S0_CLK_TXONLY, RV1126_I2S0_CLK_RXONLY },
991 .softrst_offset = 0x0300,
998 .softrst_offset = 0x0300,
1005 .softrst_offset = 0x0400,
1006 .grf_reg_offset = 0x0308,
1014 .softrst_offset = 0x0400,
1021 .softrst_offset = 0x0300,
1084 return 0; in rockchip_i2s_tdm_init_dai()
1099 for (i = 0; i < num; i++) { in rockchip_i2s_tdm_path_check()
1108 for (j = 0; j < num; j++) { in rockchip_i2s_tdm_path_check()
1123 return 0; in rockchip_i2s_tdm_path_check()
1131 for (idx = 0; idx < num; idx++) { in rockchip_i2s_tdm_tx_path_config()
1143 for (idx = 0; idx < num; idx++) { in rockchip_i2s_tdm_rx_path_config()
1167 int num, ret = 0; in rockchip_i2s_tdm_path_prepare()
1178 if (num < 0) { in rockchip_i2s_tdm_path_prepare()
1194 if (ret < 0) { in rockchip_i2s_tdm_path_prepare()
1202 if (ret < 0) { in rockchip_i2s_tdm_path_prepare()
1210 return 0; in rockchip_i2s_tdm_path_prepare()
1216 return rockchip_i2s_tdm_path_prepare(i2s_tdm, np, 0); in rockchip_i2s_tdm_tx_path_prepare()
1302 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in rockchip_i2s_tdm_probe()
1328 if (ret < 0) { in rockchip_i2s_tdm_probe()
1334 if (ret < 0) { in rockchip_i2s_tdm_probe()
1375 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in rockchip_i2s_tdm_probe()
1381 return 0; in rockchip_i2s_tdm_probe()
1401 return 0; in rockchip_i2s_tdm_remove()
1410 return 0; in rockchip_i2s_tdm_suspend()
1419 if (ret < 0) in rockchip_i2s_tdm_resume()