Lines Matching +full:port +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
19 #include <sound/soc-dai.h>
22 #include "q6dsp-errno.h"
60 #define AFE_PORT_I2S_SD0_1_MASK GENMASK(1, 0)
75 /* Port IDs */
82 #define AFE_API_VERSION_CLOCK_SET 1
87 /* SLIMbus Rx port on channel 0. */
89 /* SLIMbus Tx port on channel 0. */
91 /* SLIMbus Rx port on channel 1. */
93 /* SLIMbus Tx port on channel 1. */
95 /* SLIMbus Rx port on channel 2. */
97 /* SLIMbus Tx port on channel 2. */
99 /* SLIMbus Rx port on channel 3. */
101 /* SLIMbus Tx port on channel 3. */
103 /* SLIMbus Rx port on channel 4. */
105 /* SLIMbus Tx port on channel 4. */
107 /* SLIMbus Rx port on channel 5. */
109 /* SLIMbus Tx port on channel 5. */
111 /* SLIMbus Rx port on channel 6. */
113 /* SLIMbus Tx port on channel 6. */
126 /* Start of the range of port IDs for TDM devices. */
129 /* End of the range of port IDs for TDM devices. */
131 (AFE_PORT_ID_TDM_PORT_RANGE_START+0x50-1)
133 /* Size of the range of port IDs for TDM ports. */
135 (AFE_PORT_ID_TDM_PORT_RANGE_END - \
136 AFE_PORT_ID_TDM_PORT_RANGE_START+1)
308 /* AFE WSA Codec DMA Rx port 0 */
310 /* AFE WSA Codec DMA Tx port 0 */
312 /* AFE WSA Codec DMA Rx port 1 */
314 /* AFE WSA Codec DMA Tx port 1 */
316 /* AFE WSA Codec DMA Tx port 2 */
318 /* AFE VA Codec DMA Tx port 0 */
320 /* AFE VA Codec DMA Tx port 1 */
322 /* AFE VA Codec DMA Tx port 2 */
324 /* AFE Rx Codec DMA Rx port 0 */
326 /* AFE Tx Codec DMA Tx port 0 */
328 /* AFE Rx Codec DMA Rx port 1 */
330 /* AFE Tx Codec DMA Tx port 1 */
332 /* AFE Rx Codec DMA Rx port 2 */
334 /* AFE Tx Codec DMA Tx port 2 */
336 /* AFE Rx Codec DMA Rx port 3 */
338 /* AFE Tx Codec DMA Tx port 3 */
340 /* AFE Rx Codec DMA Rx port 4 */
342 /* AFE Tx Codec DMA Tx port 4 */
344 /* AFE Rx Codec DMA Rx port 5 */
346 /* AFE Tx Codec DMA Tx port 5 */
348 /* AFE Rx Codec DMA Rx port 6 */
350 /* AFE Rx Codec DMA Rx port 7 */
353 #define Q6AFE_LPASS_MODE_CLK1_VALID 1
355 #define Q6AFE_LPASS_CLK_SRC_INTERNAL 1
357 #define AFE_API_VERSION_TDM_CONFIG 1
358 #define AFE_API_VERSION_SLOT_MAPPING_CONFIG 1
359 #define AFE_API_VERSION_CODEC_DMA_CONFIG 1
363 #define AFE_CMD_RESP_NONE 1
385 /* Reserved for 32-bit alignment. This field must be set to 0.*/
429 * Supported values: - #AFE_SLIMBUS_DEVICE_1 - #AFE_SLIMBUS_DEVICE_2
443 * Supported values: 1 to #AFE_PORT_MAX_AUDIO_CHAN_CNT
447 * master port is to be connected.
452 /* Sampling rate of the port.
454 * - #AFE_PORT_SAMPLE_RATE_8K
455 * - #AFE_PORT_SAMPLE_RATE_16K
456 * - #AFE_PORT_SAMPLE_RATE_48K
457 * - #AFE_PORT_SAMPLE_RATE_96K
458 * - #AFE_PORT_SAMPLE_RATE_192K
574 * Mapping between Virtual Port IDs to DSP AFE Port ID
575 * On B Family SoCs DSP Port IDs are consistent across multiple SoCs
576 * on A Family SoCs DSP port IDs are same as virtual Port IDs.
580 [HDMI_RX] = { AFE_PORT_ID_MULTICHAN_HDMI_RX, HDMI_RX, 1, 1},
582 SLIMBUS_0_RX, 1, 1},
584 SLIMBUS_1_RX, 1, 1},
586 SLIMBUS_2_RX, 1, 1},
588 SLIMBUS_3_RX, 1, 1},
590 SLIMBUS_4_RX, 1, 1},
592 SLIMBUS_5_RX, 1, 1},
594 SLIMBUS_6_RX, 1, 1},
596 SLIMBUS_0_TX, 0, 1},
598 SLIMBUS_1_TX, 0, 1},
600 SLIMBUS_2_TX, 0, 1},
602 SLIMBUS_3_TX, 0, 1},
604 SLIMBUS_4_TX, 0, 1},
606 SLIMBUS_5_TX, 0, 1},
608 SLIMBUS_6_TX, 0, 1},
610 PRIMARY_MI2S_RX, 1, 1},
612 PRIMARY_MI2S_RX, 0, 1},
614 SECONDARY_MI2S_RX, 1, 1},
616 SECONDARY_MI2S_TX, 0, 1},
618 TERTIARY_MI2S_RX, 1, 1},
620 TERTIARY_MI2S_TX, 0, 1},
622 QUATERNARY_MI2S_RX, 1, 1},
624 QUATERNARY_MI2S_TX, 0, 1},
626 QUINARY_MI2S_RX, 1, 1},
628 QUINARY_MI2S_TX, 0, 1},
630 PRIMARY_TDM_RX_0, 1, 1},
632 PRIMARY_TDM_TX_0, 0, 1},
634 PRIMARY_TDM_RX_1, 1, 1},
636 PRIMARY_TDM_TX_1, 0, 1},
638 PRIMARY_TDM_RX_2, 1, 1},
640 PRIMARY_TDM_TX_2, 0, 1},
642 PRIMARY_TDM_RX_3, 1, 1},
644 PRIMARY_TDM_TX_3, 0, 1},
646 PRIMARY_TDM_RX_4, 1, 1},
648 PRIMARY_TDM_TX_4, 0, 1},
650 PRIMARY_TDM_RX_5, 1, 1},
652 PRIMARY_TDM_TX_5, 0, 1},
654 PRIMARY_TDM_RX_6, 1, 1},
656 PRIMARY_TDM_TX_6, 0, 1},
658 PRIMARY_TDM_RX_7, 1, 1},
660 PRIMARY_TDM_TX_7, 0, 1},
662 SECONDARY_TDM_RX_0, 1, 1},
664 SECONDARY_TDM_TX_0, 0, 1},
666 SECONDARY_TDM_RX_1, 1, 1},
668 SECONDARY_TDM_TX_1, 0, 1},
670 SECONDARY_TDM_RX_2, 1, 1},
672 SECONDARY_TDM_TX_2, 0, 1},
674 SECONDARY_TDM_RX_3, 1, 1},
676 SECONDARY_TDM_TX_3, 0, 1},
678 SECONDARY_TDM_RX_4, 1, 1},
680 SECONDARY_TDM_TX_4, 0, 1},
682 SECONDARY_TDM_RX_5, 1, 1},
684 SECONDARY_TDM_TX_5, 0, 1},
686 SECONDARY_TDM_RX_6, 1, 1},
688 SECONDARY_TDM_TX_6, 0, 1},
690 SECONDARY_TDM_RX_7, 1, 1},
692 SECONDARY_TDM_TX_7, 0, 1},
694 TERTIARY_TDM_RX_0, 1, 1},
696 TERTIARY_TDM_TX_0, 0, 1},
698 TERTIARY_TDM_RX_1, 1, 1},
700 TERTIARY_TDM_TX_1, 0, 1},
702 TERTIARY_TDM_RX_2, 1, 1},
704 TERTIARY_TDM_TX_2, 0, 1},
706 TERTIARY_TDM_RX_3, 1, 1},
708 TERTIARY_TDM_TX_3, 0, 1},
710 TERTIARY_TDM_RX_4, 1, 1},
712 TERTIARY_TDM_TX_4, 0, 1},
714 TERTIARY_TDM_RX_5, 1, 1},
716 TERTIARY_TDM_TX_5, 0, 1},
718 TERTIARY_TDM_RX_6, 1, 1},
720 TERTIARY_TDM_TX_6, 0, 1},
722 TERTIARY_TDM_RX_7, 1, 1},
724 TERTIARY_TDM_TX_7, 0, 1},
726 QUATERNARY_TDM_RX_0, 1, 1},
728 QUATERNARY_TDM_TX_0, 0, 1},
730 QUATERNARY_TDM_RX_1, 1, 1},
732 QUATERNARY_TDM_TX_1, 0, 1},
734 QUATERNARY_TDM_RX_2, 1, 1},
736 QUATERNARY_TDM_TX_2, 0, 1},
738 QUATERNARY_TDM_RX_3, 1, 1},
740 QUATERNARY_TDM_TX_3, 0, 1},
742 QUATERNARY_TDM_RX_4, 1, 1},
744 QUATERNARY_TDM_TX_4, 0, 1},
746 QUATERNARY_TDM_RX_5, 1, 1},
748 QUATERNARY_TDM_TX_5, 0, 1},
750 QUATERNARY_TDM_RX_6, 1, 1},
752 QUATERNARY_TDM_TX_6, 0, 1},
754 QUATERNARY_TDM_RX_7, 1, 1},
756 QUATERNARY_TDM_TX_7, 0, 1},
758 QUINARY_TDM_RX_0, 1, 1},
760 QUINARY_TDM_TX_0, 0, 1},
762 QUINARY_TDM_RX_1, 1, 1},
764 QUINARY_TDM_TX_1, 0, 1},
766 QUINARY_TDM_RX_2, 1, 1},
768 QUINARY_TDM_TX_2, 0, 1},
770 QUINARY_TDM_RX_3, 1, 1},
772 QUINARY_TDM_TX_3, 0, 1},
774 QUINARY_TDM_RX_4, 1, 1},
776 QUINARY_TDM_TX_4, 0, 1},
778 QUINARY_TDM_RX_5, 1, 1},
780 QUINARY_TDM_TX_5, 0, 1},
782 QUINARY_TDM_RX_6, 1, 1},
784 QUINARY_TDM_TX_6, 0, 1},
786 QUINARY_TDM_RX_7, 1, 1},
788 QUINARY_TDM_TX_7, 0, 1},
790 DISPLAY_PORT_RX, 1, 1},
792 WSA_CODEC_DMA_RX_0, 1, 1},
794 WSA_CODEC_DMA_TX_0, 0, 1},
796 WSA_CODEC_DMA_RX_1, 1, 1},
798 WSA_CODEC_DMA_TX_1, 0, 1},
800 WSA_CODEC_DMA_TX_2, 0, 1},
802 VA_CODEC_DMA_TX_0, 0, 1},
804 VA_CODEC_DMA_TX_1, 0, 1},
806 VA_CODEC_DMA_TX_2, 0, 1},
808 RX_CODEC_DMA_RX_0, 1, 1},
810 TX_CODEC_DMA_TX_0, 0, 1},
812 RX_CODEC_DMA_RX_1, 1, 1},
814 TX_CODEC_DMA_TX_1, 0, 1},
816 RX_CODEC_DMA_RX_2, 1, 1},
818 TX_CODEC_DMA_TX_2, 0, 1},
820 RX_CODEC_DMA_RX_3, 1, 1},
822 TX_CODEC_DMA_TX_3, 0, 1},
824 RX_CODEC_DMA_RX_4, 1, 1},
826 TX_CODEC_DMA_TX_4, 0, 1},
828 RX_CODEC_DMA_RX_5, 1, 1},
830 TX_CODEC_DMA_TX_5, 0, 1},
832 RX_CODEC_DMA_RX_6, 1, 1},
834 RX_CODEC_DMA_RX_7, 1, 1},
839 struct q6afe_port *port; in q6afe_port_free() local
843 port = container_of(ref, struct q6afe_port, refcount); in q6afe_port_free()
844 afe = port->afe; in q6afe_port_free()
845 spin_lock_irqsave(&afe->port_list_lock, flags); in q6afe_port_free()
846 list_del(&port->node); in q6afe_port_free()
847 spin_unlock_irqrestore(&afe->port_list_lock, flags); in q6afe_port_free()
848 kfree(port->scfg); in q6afe_port_free()
849 kfree(port); in q6afe_port_free()
858 spin_lock_irqsave(&afe->port_list_lock, flags); in q6afe_find_port()
859 list_for_each_entry(p, &afe->port_list, node) in q6afe_find_port()
860 if (p->token == token) { in q6afe_find_port()
862 kref_get(&p->refcount); in q6afe_find_port()
866 spin_unlock_irqrestore(&afe->port_list_lock, flags); in q6afe_find_port()
872 struct q6afe *afe = dev_get_drvdata(&adev->dev); in q6afe_callback()
874 struct apr_hdr *hdr = &data->hdr; in q6afe_callback()
875 struct q6afe_port *port; in q6afe_callback() local
877 if (!data->payload_size) in q6afe_callback()
880 res = data->payload; in q6afe_callback()
881 switch (hdr->opcode) { in q6afe_callback()
883 if (res->status) { in q6afe_callback()
884 dev_err(afe->dev, "cmd = 0x%x returned error = 0x%x\n", in q6afe_callback()
885 res->opcode, res->status); in q6afe_callback()
887 switch (res->opcode) { in q6afe_callback()
892 port = q6afe_find_port(afe, hdr->token); in q6afe_callback()
893 if (port) { in q6afe_callback()
894 port->result = *res; in q6afe_callback()
895 wake_up(&port->wait); in q6afe_callback()
896 kref_put(&port->refcount, q6afe_port_free); in q6afe_callback()
897 } else if (hdr->token == AFE_CLK_TOKEN) { in q6afe_callback()
898 afe->result = *res; in q6afe_callback()
899 wake_up(&afe->wait); in q6afe_callback()
903 dev_err(afe->dev, "Unknown cmd 0x%x\n", res->opcode); in q6afe_callback()
909 afe->result.opcode = hdr->opcode; in q6afe_callback()
910 afe->result.status = res->status; in q6afe_callback()
911 wake_up(&afe->wait); in q6afe_callback()
921 * q6afe_get_port_id() - Get port id from a given port index
923 * @index: port index
930 return -EINVAL; in q6afe_get_port_id()
937 struct q6afe_port *port, uint32_t rsp_opcode) in afe_apr_send_pkt() argument
943 mutex_lock(&afe->lock); in afe_apr_send_pkt()
944 if (port) { in afe_apr_send_pkt()
945 wait = &port->wait; in afe_apr_send_pkt()
946 result = &port->result; in afe_apr_send_pkt()
948 result = &afe->result; in afe_apr_send_pkt()
949 wait = &afe->wait; in afe_apr_send_pkt()
952 result->opcode = 0; in afe_apr_send_pkt()
953 result->status = 0; in afe_apr_send_pkt()
955 ret = apr_send_pkt(afe->apr, pkt); in afe_apr_send_pkt()
957 dev_err(afe->dev, "packet not transmitted (%d)\n", ret); in afe_apr_send_pkt()
958 ret = -EINVAL; in afe_apr_send_pkt()
962 ret = wait_event_timeout(*wait, (result->opcode == rsp_opcode), in afe_apr_send_pkt()
965 ret = -ETIMEDOUT; in afe_apr_send_pkt()
966 } else if (result->status > 0) { in afe_apr_send_pkt()
967 dev_err(afe->dev, "DSP returned error[%x]\n", in afe_apr_send_pkt()
968 result->status); in afe_apr_send_pkt()
969 ret = -EINVAL; in afe_apr_send_pkt()
975 mutex_unlock(&afe->lock); in afe_apr_send_pkt()
980 static int q6afe_set_param(struct q6afe *afe, struct q6afe_port *port, in q6afe_set_param() argument
993 return -ENOMEM; in q6afe_set_param()
1001 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_set_param()
1004 pkt->hdr.pkt_size = pkt_size; in q6afe_set_param()
1005 pkt->hdr.src_port = 0; in q6afe_set_param()
1006 pkt->hdr.dest_port = 0; in q6afe_set_param()
1007 pkt->hdr.token = token; in q6afe_set_param()
1008 pkt->hdr.opcode = AFE_SVC_CMD_SET_PARAM; in q6afe_set_param()
1010 param->payload_size = sizeof(*pdata) + psize; in q6afe_set_param()
1011 param->payload_address_lsw = 0x00; in q6afe_set_param()
1012 param->payload_address_msw = 0x00; in q6afe_set_param()
1013 param->mem_map_handle = 0x00; in q6afe_set_param()
1014 pdata->module_id = module_id; in q6afe_set_param()
1015 pdata->param_id = param_id; in q6afe_set_param()
1016 pdata->param_size = psize; in q6afe_set_param()
1018 ret = afe_apr_send_pkt(afe, pkt, port, AFE_SVC_CMD_SET_PARAM); in q6afe_set_param()
1020 dev_err(afe->dev, "AFE set params failed %d\n", ret); in q6afe_set_param()
1026 static int q6afe_port_set_param(struct q6afe_port *port, void *data, in q6afe_port_set_param() argument
1029 return q6afe_set_param(port->afe, port, data, param_id, module_id, in q6afe_port_set_param()
1030 psize, port->token); in q6afe_port_set_param()
1033 static int q6afe_port_set_param_v2(struct q6afe_port *port, void *data, in q6afe_port_set_param_v2() argument
1038 struct q6afe *afe = port->afe; in q6afe_port_set_param_v2()
1040 u16 port_id = port->id; in q6afe_port_set_param_v2()
1047 return -ENOMEM; in q6afe_port_set_param_v2()
1055 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_port_set_param_v2()
1058 pkt->hdr.pkt_size = pkt_size; in q6afe_port_set_param_v2()
1059 pkt->hdr.src_port = 0; in q6afe_port_set_param_v2()
1060 pkt->hdr.dest_port = 0; in q6afe_port_set_param_v2()
1061 pkt->hdr.token = port->token; in q6afe_port_set_param_v2()
1062 pkt->hdr.opcode = AFE_PORT_CMD_SET_PARAM_V2; in q6afe_port_set_param_v2()
1064 param->port_id = port_id; in q6afe_port_set_param_v2()
1065 param->payload_size = sizeof(*pdata) + psize; in q6afe_port_set_param_v2()
1066 param->payload_address_lsw = 0x00; in q6afe_port_set_param_v2()
1067 param->payload_address_msw = 0x00; in q6afe_port_set_param_v2()
1068 param->mem_map_handle = 0x00; in q6afe_port_set_param_v2()
1069 pdata->module_id = module_id; in q6afe_port_set_param_v2()
1070 pdata->param_id = param_id; in q6afe_port_set_param_v2()
1071 pdata->param_size = psize; in q6afe_port_set_param_v2()
1073 ret = afe_apr_send_pkt(afe, pkt, port, AFE_PORT_CMD_SET_PARAM_V2); in q6afe_port_set_param_v2()
1075 dev_err(afe->dev, "AFE enable for port 0x%x failed %d\n", in q6afe_port_set_param_v2()
1082 static int q6afe_port_set_lpass_clock(struct q6afe_port *port, in q6afe_port_set_lpass_clock() argument
1085 return q6afe_port_set_param_v2(port, cfg, in q6afe_port_set_lpass_clock()
1091 static int q6afe_set_lpass_clock_v2(struct q6afe_port *port, in q6afe_set_lpass_clock_v2() argument
1094 return q6afe_port_set_param(port, cfg, AFE_PARAM_ID_CLOCK_SET, in q6afe_set_lpass_clock_v2()
1098 static int q6afe_set_digital_codec_core_clock(struct q6afe_port *port, in q6afe_set_digital_codec_core_clock() argument
1101 return q6afe_port_set_param_v2(port, cfg, in q6afe_set_digital_codec_core_clock()
1110 struct q6afe *afe = dev_get_drvdata(dev->parent); in q6afe_set_lpass_clock()
1126 int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id, in q6afe_port_set_sysclk() argument
1140 ret = q6afe_set_digital_codec_core_clock(port, &dcfg); in q6afe_port_set_sysclk()
1148 ret = q6afe_port_set_lpass_clock(port, &ccfg); in q6afe_port_set_sysclk()
1157 ret = q6afe_port_set_lpass_clock(port, &ccfg); in q6afe_port_set_sysclk()
1169 ret = q6afe_set_lpass_clock_v2(port, &cset); in q6afe_port_set_sysclk()
1172 ret = -EINVAL; in q6afe_port_set_sysclk()
1181 * q6afe_port_stop() - Stop a afe port
1183 * @port: Instance of port to stop
1187 int q6afe_port_stop(struct q6afe_port *port) in q6afe_port_stop() argument
1190 struct q6afe *afe = port->afe; in q6afe_port_stop()
1192 int port_id = port->id; in q6afe_port_stop()
1197 index = port->token; in q6afe_port_stop()
1199 dev_err(afe->dev, "AFE port index[%d] invalid!\n", index); in q6afe_port_stop()
1200 return -EINVAL; in q6afe_port_stop()
1206 return -ENOMEM; in q6afe_port_stop()
1211 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_port_stop()
1214 pkt->hdr.pkt_size = pkt_size; in q6afe_port_stop()
1215 pkt->hdr.src_port = 0; in q6afe_port_stop()
1216 pkt->hdr.dest_port = 0; in q6afe_port_stop()
1217 pkt->hdr.token = index; in q6afe_port_stop()
1218 pkt->hdr.opcode = AFE_PORT_CMD_DEVICE_STOP; in q6afe_port_stop()
1219 stop->port_id = port_id; in q6afe_port_stop()
1220 stop->reserved = 0; in q6afe_port_stop()
1222 ret = afe_apr_send_pkt(afe, pkt, port, AFE_PORT_CMD_DEVICE_STOP); in q6afe_port_stop()
1224 dev_err(afe->dev, "AFE close failed %d\n", ret); in q6afe_port_stop()
1232 * q6afe_slim_port_prepare() - Prepare slim afe port.
1234 * @port: Instance of afe port
1235 * @cfg: SLIM configuration for the afe port
1238 void q6afe_slim_port_prepare(struct q6afe_port *port, in q6afe_slim_port_prepare() argument
1241 union afe_port_config *pcfg = &port->port_cfg; in q6afe_slim_port_prepare()
1243 pcfg->slim_cfg.sb_cfg_minor_version = AFE_API_VERSION_SLIMBUS_CONFIG; in q6afe_slim_port_prepare()
1244 pcfg->slim_cfg.sample_rate = cfg->sample_rate; in q6afe_slim_port_prepare()
1245 pcfg->slim_cfg.bit_width = cfg->bit_width; in q6afe_slim_port_prepare()
1246 pcfg->slim_cfg.num_channels = cfg->num_channels; in q6afe_slim_port_prepare()
1247 pcfg->slim_cfg.data_format = cfg->data_format; in q6afe_slim_port_prepare()
1248 pcfg->slim_cfg.shared_ch_mapping[0] = cfg->ch_mapping[0]; in q6afe_slim_port_prepare()
1249 pcfg->slim_cfg.shared_ch_mapping[1] = cfg->ch_mapping[1]; in q6afe_slim_port_prepare()
1250 pcfg->slim_cfg.shared_ch_mapping[2] = cfg->ch_mapping[2]; in q6afe_slim_port_prepare()
1251 pcfg->slim_cfg.shared_ch_mapping[3] = cfg->ch_mapping[3]; in q6afe_slim_port_prepare()
1257 * q6afe_tdm_port_prepare() - Prepare tdm afe port.
1259 * @port: Instance of afe port
1260 * @cfg: TDM configuration for the afe port
1263 void q6afe_tdm_port_prepare(struct q6afe_port *port, in q6afe_tdm_port_prepare() argument
1266 union afe_port_config *pcfg = &port->port_cfg; in q6afe_tdm_port_prepare()
1268 pcfg->tdm_cfg.tdm_cfg_minor_version = AFE_API_VERSION_TDM_CONFIG; in q6afe_tdm_port_prepare()
1269 pcfg->tdm_cfg.num_channels = cfg->num_channels; in q6afe_tdm_port_prepare()
1270 pcfg->tdm_cfg.sample_rate = cfg->sample_rate; in q6afe_tdm_port_prepare()
1271 pcfg->tdm_cfg.bit_width = cfg->bit_width; in q6afe_tdm_port_prepare()
1272 pcfg->tdm_cfg.data_format = cfg->data_format; in q6afe_tdm_port_prepare()
1273 pcfg->tdm_cfg.sync_mode = cfg->sync_mode; in q6afe_tdm_port_prepare()
1274 pcfg->tdm_cfg.sync_src = cfg->sync_src; in q6afe_tdm_port_prepare()
1275 pcfg->tdm_cfg.nslots_per_frame = cfg->nslots_per_frame; in q6afe_tdm_port_prepare()
1277 pcfg->tdm_cfg.slot_width = cfg->slot_width; in q6afe_tdm_port_prepare()
1278 pcfg->tdm_cfg.slot_mask = cfg->slot_mask; in q6afe_tdm_port_prepare()
1279 port->scfg = kzalloc(sizeof(*port->scfg), GFP_KERNEL); in q6afe_tdm_port_prepare()
1280 if (!port->scfg) in q6afe_tdm_port_prepare()
1283 port->scfg->minor_version = AFE_API_VERSION_SLOT_MAPPING_CONFIG; in q6afe_tdm_port_prepare()
1284 port->scfg->num_channels = cfg->num_channels; in q6afe_tdm_port_prepare()
1285 port->scfg->bitwidth = cfg->bit_width; in q6afe_tdm_port_prepare()
1286 port->scfg->data_align_type = cfg->data_align_type; in q6afe_tdm_port_prepare()
1287 memcpy(port->scfg->ch_mapping, cfg->ch_mapping, in q6afe_tdm_port_prepare()
1293 * q6afe_hdmi_port_prepare() - Prepare hdmi afe port.
1295 * @port: Instance of afe port
1296 * @cfg: HDMI configuration for the afe port
1299 void q6afe_hdmi_port_prepare(struct q6afe_port *port, in q6afe_hdmi_port_prepare() argument
1302 union afe_port_config *pcfg = &port->port_cfg; in q6afe_hdmi_port_prepare()
1304 pcfg->hdmi_multi_ch.hdmi_cfg_minor_version = in q6afe_hdmi_port_prepare()
1306 pcfg->hdmi_multi_ch.datatype = cfg->datatype; in q6afe_hdmi_port_prepare()
1307 pcfg->hdmi_multi_ch.channel_allocation = cfg->channel_allocation; in q6afe_hdmi_port_prepare()
1308 pcfg->hdmi_multi_ch.sample_rate = cfg->sample_rate; in q6afe_hdmi_port_prepare()
1309 pcfg->hdmi_multi_ch.bit_width = cfg->bit_width; in q6afe_hdmi_port_prepare()
1314 * q6afe_i2s_port_prepare() - Prepare i2s afe port.
1316 * @port: Instance of afe port
1317 * @cfg: I2S configuration for the afe port
1320 int q6afe_i2s_port_prepare(struct q6afe_port *port, struct q6afe_i2s_cfg *cfg) in q6afe_i2s_port_prepare() argument
1322 union afe_port_config *pcfg = &port->port_cfg; in q6afe_i2s_port_prepare()
1323 struct device *dev = port->afe->dev; in q6afe_i2s_port_prepare()
1326 pcfg->i2s_cfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG; in q6afe_i2s_port_prepare()
1327 pcfg->i2s_cfg.sample_rate = cfg->sample_rate; in q6afe_i2s_port_prepare()
1328 pcfg->i2s_cfg.bit_width = cfg->bit_width; in q6afe_i2s_port_prepare()
1329 pcfg->i2s_cfg.data_format = AFE_LINEAR_PCM_DATA; in q6afe_i2s_port_prepare()
1331 switch (cfg->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { in q6afe_i2s_port_prepare()
1333 pcfg->i2s_cfg.ws_src = AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL; in q6afe_i2s_port_prepare()
1337 pcfg->i2s_cfg.ws_src = AFE_PORT_CONFIG_I2S_WS_SRC_EXTERNAL; in q6afe_i2s_port_prepare()
1343 num_sd_lines = hweight_long(cfg->sd_line_mask); in q6afe_i2s_port_prepare()
1348 return -EINVAL; in q6afe_i2s_port_prepare()
1349 case 1: in q6afe_i2s_port_prepare()
1350 switch (cfg->sd_line_mask) { in q6afe_i2s_port_prepare()
1352 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD0; in q6afe_i2s_port_prepare()
1355 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD1; in q6afe_i2s_port_prepare()
1358 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD2; in q6afe_i2s_port_prepare()
1361 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD3; in q6afe_i2s_port_prepare()
1365 return -EINVAL; in q6afe_i2s_port_prepare()
1369 switch (cfg->sd_line_mask) { in q6afe_i2s_port_prepare()
1371 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_QUAD01; in q6afe_i2s_port_prepare()
1374 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_QUAD23; in q6afe_i2s_port_prepare()
1378 return -EINVAL; in q6afe_i2s_port_prepare()
1382 switch (cfg->sd_line_mask) { in q6afe_i2s_port_prepare()
1384 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_6CHS; in q6afe_i2s_port_prepare()
1388 return -EINVAL; in q6afe_i2s_port_prepare()
1392 switch (cfg->sd_line_mask) { in q6afe_i2s_port_prepare()
1394 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_8CHS; in q6afe_i2s_port_prepare()
1399 return -EINVAL; in q6afe_i2s_port_prepare()
1404 return -EINVAL; in q6afe_i2s_port_prepare()
1407 switch (cfg->num_channels) { in q6afe_i2s_port_prepare()
1408 case 1: in q6afe_i2s_port_prepare()
1410 switch (pcfg->i2s_cfg.channel_mode) { in q6afe_i2s_port_prepare()
1414 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD0; in q6afe_i2s_port_prepare()
1417 pcfg->i2s_cfg.channel_mode = AFE_PORT_I2S_SD2; in q6afe_i2s_port_prepare()
1421 if (cfg->num_channels == 2) in q6afe_i2s_port_prepare()
1422 pcfg->i2s_cfg.mono_stereo = AFE_PORT_I2S_STEREO; in q6afe_i2s_port_prepare()
1424 pcfg->i2s_cfg.mono_stereo = AFE_PORT_I2S_MONO; in q6afe_i2s_port_prepare()
1429 if (pcfg->i2s_cfg.channel_mode < AFE_PORT_I2S_QUAD01) { in q6afe_i2s_port_prepare()
1431 return -EINVAL; in q6afe_i2s_port_prepare()
1436 if (pcfg->i2s_cfg.channel_mode < AFE_PORT_I2S_6CHS) { in q6afe_i2s_port_prepare()
1438 return -EINVAL; in q6afe_i2s_port_prepare()
1443 if (pcfg->i2s_cfg.channel_mode < AFE_PORT_I2S_8CHS) { in q6afe_i2s_port_prepare()
1445 return -EINVAL; in q6afe_i2s_port_prepare()
1457 * q6afe_cdc_dma_port_prepare() - Prepare dma afe port.
1459 * @port: Instance of afe port
1460 * @cfg: DMA configuration for the afe port
1463 void q6afe_cdc_dma_port_prepare(struct q6afe_port *port, in q6afe_cdc_dma_port_prepare() argument
1466 union afe_port_config *pcfg = &port->port_cfg; in q6afe_cdc_dma_port_prepare()
1467 struct afe_param_id_cdc_dma_cfg *dma_cfg = &pcfg->dma_cfg; in q6afe_cdc_dma_port_prepare()
1469 dma_cfg->cdc_dma_cfg_minor_version = AFE_API_VERSION_CODEC_DMA_CONFIG; in q6afe_cdc_dma_port_prepare()
1470 dma_cfg->sample_rate = cfg->sample_rate; in q6afe_cdc_dma_port_prepare()
1471 dma_cfg->bit_width = cfg->bit_width; in q6afe_cdc_dma_port_prepare()
1472 dma_cfg->data_format = cfg->data_format; in q6afe_cdc_dma_port_prepare()
1473 dma_cfg->num_channels = cfg->num_channels; in q6afe_cdc_dma_port_prepare()
1474 if (!cfg->active_channels_mask) in q6afe_cdc_dma_port_prepare()
1475 dma_cfg->active_channels_mask = (1 << cfg->num_channels) - 1; in q6afe_cdc_dma_port_prepare()
1479 * q6afe_port_start() - Start a afe port
1481 * @port: Instance of port to start
1485 int q6afe_port_start(struct q6afe_port *port) in q6afe_port_start() argument
1488 struct q6afe *afe = port->afe; in q6afe_port_start()
1489 int port_id = port->id; in q6afe_port_start()
1490 int ret, param_id = port->cfg_type; in q6afe_port_start()
1495 ret = q6afe_port_set_param_v2(port, &port->port_cfg, param_id, in q6afe_port_start()
1497 sizeof(port->port_cfg)); in q6afe_port_start()
1499 dev_err(afe->dev, "AFE enable for port 0x%x failed %d\n", in q6afe_port_start()
1504 if (port->scfg) { in q6afe_port_start()
1505 ret = q6afe_port_set_param_v2(port, port->scfg, in q6afe_port_start()
1507 AFE_MODULE_TDM, sizeof(*port->scfg)); in q6afe_port_start()
1509 dev_err(afe->dev, "AFE enable for port 0x%x failed %d\n", in q6afe_port_start()
1518 return -ENOMEM; in q6afe_port_start()
1523 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_port_start()
1526 pkt->hdr.pkt_size = pkt_size; in q6afe_port_start()
1527 pkt->hdr.src_port = 0; in q6afe_port_start()
1528 pkt->hdr.dest_port = 0; in q6afe_port_start()
1529 pkt->hdr.token = port->token; in q6afe_port_start()
1530 pkt->hdr.opcode = AFE_PORT_CMD_DEVICE_START; in q6afe_port_start()
1532 start->port_id = port_id; in q6afe_port_start()
1534 ret = afe_apr_send_pkt(afe, pkt, port, AFE_PORT_CMD_DEVICE_START); in q6afe_port_start()
1536 dev_err(afe->dev, "AFE enable for port 0x%x failed %d\n", in q6afe_port_start()
1545 * q6afe_port_get_from_id() - Get port instance from a port id
1548 * @id: port id
1550 * Return: Will be an error pointer on error or a valid afe port
1556 struct q6afe *afe = dev_get_drvdata(dev->parent); in q6afe_port_get_from_id()
1557 struct q6afe_port *port; in q6afe_port_get_from_id() local
1562 dev_err(dev, "AFE port token[%d] invalid!\n", id); in q6afe_port_get_from_id()
1563 return ERR_PTR(-EINVAL); in q6afe_port_get_from_id()
1566 /* if port is multiple times bind/unbind before callback finishes */ in q6afe_port_get_from_id()
1567 port = q6afe_find_port(afe, id); in q6afe_port_get_from_id()
1568 if (port) { in q6afe_port_get_from_id()
1569 dev_err(dev, "AFE Port already open\n"); in q6afe_port_get_from_id()
1570 return port; in q6afe_port_get_from_id()
1616 dev_err(dev, "Invalid port id 0x%x\n", port_id); in q6afe_port_get_from_id()
1617 return ERR_PTR(-EINVAL); in q6afe_port_get_from_id()
1620 port = kzalloc(sizeof(*port), GFP_KERNEL); in q6afe_port_get_from_id()
1621 if (!port) in q6afe_port_get_from_id()
1622 return ERR_PTR(-ENOMEM); in q6afe_port_get_from_id()
1624 init_waitqueue_head(&port->wait); in q6afe_port_get_from_id()
1626 port->token = id; in q6afe_port_get_from_id()
1627 port->id = port_id; in q6afe_port_get_from_id()
1628 port->afe = afe; in q6afe_port_get_from_id()
1629 port->cfg_type = cfg_type; in q6afe_port_get_from_id()
1630 kref_init(&port->refcount); in q6afe_port_get_from_id()
1632 spin_lock_irqsave(&afe->port_list_lock, flags); in q6afe_port_get_from_id()
1633 list_add_tail(&port->node, &afe->port_list); in q6afe_port_get_from_id()
1634 spin_unlock_irqrestore(&afe->port_list_lock, flags); in q6afe_port_get_from_id()
1636 return port; in q6afe_port_get_from_id()
1642 * q6afe_port_put() - Release port reference
1644 * @port: Instance of port to put
1646 void q6afe_port_put(struct q6afe_port *port) in q6afe_port_put() argument
1648 kref_put(&port->refcount, q6afe_port_free); in q6afe_port_put()
1655 struct q6afe *afe = dev_get_drvdata(dev->parent); in q6afe_unvote_lpass_core_hw()
1665 return -ENOMEM; in q6afe_unvote_lpass_core_hw()
1670 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_unvote_lpass_core_hw()
1673 pkt->hdr.pkt_size = pkt_size; in q6afe_unvote_lpass_core_hw()
1674 pkt->hdr.src_port = 0; in q6afe_unvote_lpass_core_hw()
1675 pkt->hdr.dest_port = 0; in q6afe_unvote_lpass_core_hw()
1676 pkt->hdr.token = hw_block_id; in q6afe_unvote_lpass_core_hw()
1677 pkt->hdr.opcode = AFE_CMD_REMOTE_LPASS_CORE_HW_DEVOTE_REQUEST; in q6afe_unvote_lpass_core_hw()
1678 vote_cfg->hw_block_id = hw_block_id; in q6afe_unvote_lpass_core_hw()
1679 vote_cfg->client_handle = client_handle; in q6afe_unvote_lpass_core_hw()
1681 ret = apr_send_pkt(afe->apr, pkt); in q6afe_unvote_lpass_core_hw()
1683 dev_err(afe->dev, "AFE failed to unvote (%d)\n", hw_block_id); in q6afe_unvote_lpass_core_hw()
1693 struct q6afe *afe = dev_get_drvdata(dev->parent); in q6afe_vote_lpass_core_hw()
1703 return -ENOMEM; in q6afe_vote_lpass_core_hw()
1708 pkt->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, in q6afe_vote_lpass_core_hw()
1711 pkt->hdr.pkt_size = pkt_size; in q6afe_vote_lpass_core_hw()
1712 pkt->hdr.src_port = 0; in q6afe_vote_lpass_core_hw()
1713 pkt->hdr.dest_port = 0; in q6afe_vote_lpass_core_hw()
1714 pkt->hdr.token = hw_block_id; in q6afe_vote_lpass_core_hw()
1715 pkt->hdr.opcode = AFE_CMD_REMOTE_LPASS_CORE_HW_VOTE_REQUEST; in q6afe_vote_lpass_core_hw()
1716 vote_cfg->hw_block_id = hw_block_id; in q6afe_vote_lpass_core_hw()
1717 strscpy(vote_cfg->client_name, client_name, in q6afe_vote_lpass_core_hw()
1718 sizeof(vote_cfg->client_name)); in q6afe_vote_lpass_core_hw()
1723 dev_err(afe->dev, "AFE failed to vote (%d)\n", hw_block_id); in q6afe_vote_lpass_core_hw()
1734 struct device *dev = &adev->dev; in q6afe_probe()
1738 return -ENOMEM; in q6afe_probe()
1740 q6core_get_svc_api_info(adev->svc_id, &afe->ainfo); in q6afe_probe()
1741 afe->apr = adev; in q6afe_probe()
1742 mutex_init(&afe->lock); in q6afe_probe()
1743 init_waitqueue_head(&afe->wait); in q6afe_probe()
1744 afe->dev = dev; in q6afe_probe()
1745 INIT_LIST_HEAD(&afe->port_list); in q6afe_probe()
1746 spin_lock_init(&afe->port_list_lock); in q6afe_probe()
1765 .name = "qcom-q6afe",