702 			val_irqclr = (LPAIF_IRQ_ALL(ch) |  in lpass_platform_pcmops_trigger()
708 			val_mask = (LPAIF_IRQ_ALL(ch) |  in lpass_platform_pcmops_trigger()
712 			val_irqen = (LPAIF_IRQ_ALL(ch) |  in lpass_platform_pcmops_trigger()
723 			val_irqclr = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
727 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
728 			val_irqen = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
739 			val_irqclr = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
742 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
743 			val_irqen = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
753 			val_irqclr = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
756 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
757 			val_irqen = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
795 			val_mask = (LPAIF_IRQ_ALL(ch) |  in lpass_platform_pcmops_trigger()
807 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
820 			val_irqclr = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
823 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
824 			val_irqen = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
835 			val_irqclr = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
838 			val_mask = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
839 			val_irqen = LPAIF_IRQ_ALL(ch);  in lpass_platform_pcmops_trigger()
938 	mask = LPAIF_IRQ_ALL(chan);  in lpass_dma_interrupt_handler()
1036 		if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->substream[chan]) {  in lpass_platform_lpaif_irq()
1064 		if (irqs & (LPAIF_IRQ_ALL(chan) | LPAIF_IRQ_HDMI_REQ_ON_PRELOAD(chan) |  in lpass_platform_hdmiif_irq()
1091 		if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->rxtx_substream[chan]) {  in lpass_platform_rxtxif_irq()
1116 		if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->va_substream[chan]) {  in lpass_platform_vaif_irq()