Lines Matching refs:v

47 	struct lpass_variant *v = drvdata->variant;  in lpass_cpu_init_i2sctl_bitfields()  local
49 i2sctl->loopback = devm_regmap_field_alloc(dev, map, v->loopback); in lpass_cpu_init_i2sctl_bitfields()
50 i2sctl->spken = devm_regmap_field_alloc(dev, map, v->spken); in lpass_cpu_init_i2sctl_bitfields()
51 i2sctl->spkmode = devm_regmap_field_alloc(dev, map, v->spkmode); in lpass_cpu_init_i2sctl_bitfields()
52 i2sctl->spkmono = devm_regmap_field_alloc(dev, map, v->spkmono); in lpass_cpu_init_i2sctl_bitfields()
53 i2sctl->micen = devm_regmap_field_alloc(dev, map, v->micen); in lpass_cpu_init_i2sctl_bitfields()
54 i2sctl->micmode = devm_regmap_field_alloc(dev, map, v->micmode); in lpass_cpu_init_i2sctl_bitfields()
55 i2sctl->micmono = devm_regmap_field_alloc(dev, map, v->micmono); in lpass_cpu_init_i2sctl_bitfields()
56 i2sctl->wssrc = devm_regmap_field_alloc(dev, map, v->wssrc); in lpass_cpu_init_i2sctl_bitfields()
57 i2sctl->bitwidth = devm_regmap_field_alloc(dev, map, v->bitwidth); in lpass_cpu_init_i2sctl_bitfields()
491 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_writeable() local
494 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_writeable()
495 if (reg == LPAIF_I2SCTL_REG(v, i)) in lpass_cpu_regmap_writeable()
498 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_writeable()
499 if (reg == LPAIF_IRQEN_REG(v, i)) in lpass_cpu_regmap_writeable()
501 if (reg == LPAIF_IRQCLEAR_REG(v, i)) in lpass_cpu_regmap_writeable()
505 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_writeable()
506 if (reg == LPAIF_RDMACTL_REG(v, i)) in lpass_cpu_regmap_writeable()
508 if (reg == LPAIF_RDMABASE_REG(v, i)) in lpass_cpu_regmap_writeable()
510 if (reg == LPAIF_RDMABUFF_REG(v, i)) in lpass_cpu_regmap_writeable()
512 if (reg == LPAIF_RDMAPER_REG(v, i)) in lpass_cpu_regmap_writeable()
516 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_writeable()
517 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
519 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
521 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
523 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
533 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_readable() local
536 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_readable()
537 if (reg == LPAIF_I2SCTL_REG(v, i)) in lpass_cpu_regmap_readable()
540 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_readable()
541 if (reg == LPAIF_IRQCLEAR_REG(v, i)) in lpass_cpu_regmap_readable()
543 if (reg == LPAIF_IRQEN_REG(v, i)) in lpass_cpu_regmap_readable()
545 if (reg == LPAIF_IRQSTAT_REG(v, i)) in lpass_cpu_regmap_readable()
549 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_readable()
550 if (reg == LPAIF_RDMACTL_REG(v, i)) in lpass_cpu_regmap_readable()
552 if (reg == LPAIF_RDMABASE_REG(v, i)) in lpass_cpu_regmap_readable()
554 if (reg == LPAIF_RDMABUFF_REG(v, i)) in lpass_cpu_regmap_readable()
556 if (reg == LPAIF_RDMACURR_REG(v, i)) in lpass_cpu_regmap_readable()
558 if (reg == LPAIF_RDMAPER_REG(v, i)) in lpass_cpu_regmap_readable()
562 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_readable()
563 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
565 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
567 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
569 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
571 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
581 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_volatile() local
584 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_volatile()
585 if (reg == LPAIF_IRQCLEAR_REG(v, i)) in lpass_cpu_regmap_volatile()
587 if (reg == LPAIF_IRQSTAT_REG(v, i)) in lpass_cpu_regmap_volatile()
591 for (i = 0; i < v->rdma_channels; ++i) in lpass_cpu_regmap_volatile()
592 if (reg == LPAIF_RDMACURR_REG(v, i)) in lpass_cpu_regmap_volatile()
595 for (i = 0; i < v->wrdma_channels; ++i) in lpass_cpu_regmap_volatile()
596 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_volatile()
616 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_init_bitfields() local
633 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->soft_reset, tx_ctl->soft_reset); in lpass_hdmi_init_bitfields()
634 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->force_reset, tx_ctl->force_reset); in lpass_hdmi_init_bitfields()
637 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->legacy_en, legacy_en); in lpass_hdmi_init_bitfields()
644 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->replace_vbit, vbit_ctl->replace_vbit); in lpass_hdmi_init_bitfields()
645 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->vbit_stream, vbit_ctl->vbit_stream); in lpass_hdmi_init_bitfields()
649 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->calc_en, tx_parity); in lpass_hdmi_init_bitfields()
656 rval = devm_regmap_field_bulk_alloc(dev, map, &meta_ctl->mute, &v->mute, 7); in lpass_hdmi_init_bitfields()
665 rval = devm_regmap_field_bulk_alloc(dev, map, &sstream_ctl->sstream_en, &v->sstream_en, 9); in lpass_hdmi_init_bitfields()
672 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->msb_bits, ch_msb); in lpass_hdmi_init_bitfields()
675 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->lsb_bits, ch_lsb); in lpass_hdmi_init_bitfields()
682 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_chs, tx_dmactl->use_hw_chs); in lpass_hdmi_init_bitfields()
683 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_usr, tx_dmactl->use_hw_usr); in lpass_hdmi_init_bitfields()
684 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_chs_sel, tx_dmactl->hw_chs_sel); in lpass_hdmi_init_bitfields()
685 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_usr_sel, tx_dmactl->hw_usr_sel); in lpass_hdmi_init_bitfields()
694 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_writeable() local
697 if (reg == LPASS_HDMI_TX_CTL_ADDR(v)) in lpass_hdmi_regmap_writeable()
699 if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) in lpass_hdmi_regmap_writeable()
701 if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) in lpass_hdmi_regmap_writeable()
703 if (reg == LPASS_HDMI_TX_PARITY_ADDR(v)) in lpass_hdmi_regmap_writeable()
705 if (reg == LPASS_HDMI_TX_DP_ADDR(v)) in lpass_hdmi_regmap_writeable()
707 if (reg == LPASS_HDMI_TX_SSTREAM_ADDR(v)) in lpass_hdmi_regmap_writeable()
709 if (reg == LPASS_HDMITX_APP_IRQEN_REG(v)) in lpass_hdmi_regmap_writeable()
711 if (reg == LPASS_HDMITX_APP_IRQCLEAR_REG(v)) in lpass_hdmi_regmap_writeable()
714 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_writeable()
715 if (reg == LPASS_HDMI_TX_CH_LSB_ADDR(v, i)) in lpass_hdmi_regmap_writeable()
717 if (reg == LPASS_HDMI_TX_CH_MSB_ADDR(v, i)) in lpass_hdmi_regmap_writeable()
719 if (reg == LPASS_HDMI_TX_DMA_ADDR(v, i)) in lpass_hdmi_regmap_writeable()
723 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_writeable()
724 if (reg == LPAIF_HDMI_RDMACTL_REG(v, i)) in lpass_hdmi_regmap_writeable()
726 if (reg == LPAIF_HDMI_RDMABASE_REG(v, i)) in lpass_hdmi_regmap_writeable()
728 if (reg == LPAIF_HDMI_RDMABUFF_REG(v, i)) in lpass_hdmi_regmap_writeable()
730 if (reg == LPAIF_HDMI_RDMAPER_REG(v, i)) in lpass_hdmi_regmap_writeable()
739 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_readable() local
742 if (reg == LPASS_HDMI_TX_CTL_ADDR(v)) in lpass_hdmi_regmap_readable()
744 if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) in lpass_hdmi_regmap_readable()
746 if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) in lpass_hdmi_regmap_readable()
749 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_readable()
750 if (reg == LPASS_HDMI_TX_CH_LSB_ADDR(v, i)) in lpass_hdmi_regmap_readable()
752 if (reg == LPASS_HDMI_TX_CH_MSB_ADDR(v, i)) in lpass_hdmi_regmap_readable()
754 if (reg == LPASS_HDMI_TX_DMA_ADDR(v, i)) in lpass_hdmi_regmap_readable()
758 if (reg == LPASS_HDMI_TX_PARITY_ADDR(v)) in lpass_hdmi_regmap_readable()
760 if (reg == LPASS_HDMI_TX_DP_ADDR(v)) in lpass_hdmi_regmap_readable()
762 if (reg == LPASS_HDMI_TX_SSTREAM_ADDR(v)) in lpass_hdmi_regmap_readable()
764 if (reg == LPASS_HDMITX_APP_IRQEN_REG(v)) in lpass_hdmi_regmap_readable()
766 if (reg == LPASS_HDMITX_APP_IRQSTAT_REG(v)) in lpass_hdmi_regmap_readable()
769 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_readable()
770 if (reg == LPAIF_HDMI_RDMACTL_REG(v, i)) in lpass_hdmi_regmap_readable()
772 if (reg == LPAIF_HDMI_RDMABASE_REG(v, i)) in lpass_hdmi_regmap_readable()
774 if (reg == LPAIF_HDMI_RDMABUFF_REG(v, i)) in lpass_hdmi_regmap_readable()
776 if (reg == LPAIF_HDMI_RDMAPER_REG(v, i)) in lpass_hdmi_regmap_readable()
778 if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) in lpass_hdmi_regmap_readable()
788 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_volatile() local
791 if (reg == LPASS_HDMITX_APP_IRQSTAT_REG(v)) in lpass_hdmi_regmap_volatile()
793 if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) in lpass_hdmi_regmap_volatile()
795 if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) in lpass_hdmi_regmap_volatile()
797 if (reg == LPASS_HDMI_TX_PARITY_ADDR(v)) in lpass_hdmi_regmap_volatile()
800 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_volatile()
801 if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) in lpass_hdmi_regmap_volatile()
803 if (reg == LPASS_HDMI_TX_DMA_ADDR(v, i)) in lpass_hdmi_regmap_volatile()
805 if (reg == LPASS_HDMI_TX_CH_LSB_ADDR(v, i)) in lpass_hdmi_regmap_volatile()
807 if (reg == LPASS_HDMI_TX_CH_MSB_ADDR(v, i)) in lpass_hdmi_regmap_volatile()
827 struct lpass_variant *v = drvdata->variant; in __lpass_rxtx_regmap_accessible() local
830 for (i = 0; i < v->rxtx_irq_ports; ++i) { in __lpass_rxtx_regmap_accessible()
831 if (reg == LPAIF_RXTX_IRQCLEAR_REG(v, i)) in __lpass_rxtx_regmap_accessible()
833 if (reg == LPAIF_RXTX_IRQEN_REG(v, i)) in __lpass_rxtx_regmap_accessible()
835 if (reg == LPAIF_RXTX_IRQSTAT_REG(v, i)) in __lpass_rxtx_regmap_accessible()
839 for (i = 0; i < v->rxtx_rdma_channels; ++i) { in __lpass_rxtx_regmap_accessible()
840 if (reg == LPAIF_CDC_RXTX_RDMACTL_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
842 if (reg == LPAIF_CDC_RXTX_RDMABASE_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
844 if (reg == LPAIF_CDC_RXTX_RDMABUFF_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
847 if (reg == LPAIF_CDC_RXTX_RDMACURR_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
850 if (reg == LPAIF_CDC_RXTX_RDMAPER_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
852 if (reg == LPAIF_CDC_RXTX_RDMA_INTF_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
856 for (i = 0; i < v->rxtx_wrdma_channels; ++i) { in __lpass_rxtx_regmap_accessible()
857 if (reg == LPAIF_CDC_RXTX_WRDMACTL_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
860 if (reg == LPAIF_CDC_RXTX_WRDMABASE_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
863 if (reg == LPAIF_CDC_RXTX_WRDMABUFF_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
867 if (reg == LPAIF_CDC_RXTX_WRDMACURR_REG(v, i, LPASS_CDC_DMA_RX0)) in __lpass_rxtx_regmap_accessible()
870 if (reg == LPAIF_CDC_RXTX_WRDMAPER_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
873 if (reg == LPAIF_CDC_RXTX_WRDMA_INTF_REG(v, i + v->rxtx_wrdma_channel_start, in __lpass_rxtx_regmap_accessible()
893 struct lpass_variant *v = drvdata->variant; in lpass_rxtx_regmap_volatile() local
896 for (i = 0; i < v->rxtx_irq_ports; ++i) { in lpass_rxtx_regmap_volatile()
897 if (reg == LPAIF_RXTX_IRQCLEAR_REG(v, i)) in lpass_rxtx_regmap_volatile()
899 if (reg == LPAIF_RXTX_IRQSTAT_REG(v, i)) in lpass_rxtx_regmap_volatile()
903 for (i = 0; i < v->rxtx_rdma_channels; ++i) in lpass_rxtx_regmap_volatile()
904 if (reg == LPAIF_CDC_RXTX_RDMACURR_REG(v, i, LPASS_CDC_DMA_RX0)) in lpass_rxtx_regmap_volatile()
907 for (i = 0; i < v->rxtx_wrdma_channels; ++i) in lpass_rxtx_regmap_volatile()
908 if (reg == LPAIF_CDC_RXTX_WRDMACURR_REG(v, i + v->rxtx_wrdma_channel_start, in lpass_rxtx_regmap_volatile()
918 struct lpass_variant *v = drvdata->variant; in __lpass_va_regmap_accessible() local
921 for (i = 0; i < v->va_irq_ports; ++i) { in __lpass_va_regmap_accessible()
922 if (reg == LPAIF_VA_IRQCLEAR_REG(v, i)) in __lpass_va_regmap_accessible()
924 if (reg == LPAIF_VA_IRQEN_REG(v, i)) in __lpass_va_regmap_accessible()
926 if (reg == LPAIF_VA_IRQSTAT_REG(v, i)) in __lpass_va_regmap_accessible()
930 for (i = 0; i < v->va_wrdma_channels; ++i) { in __lpass_va_regmap_accessible()
931 if (reg == LPAIF_CDC_VA_WRDMACTL_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
934 if (reg == LPAIF_CDC_VA_WRDMABASE_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
937 if (reg == LPAIF_CDC_VA_WRDMABUFF_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
941 if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
945 if (reg == LPAIF_CDC_VA_WRDMAPER_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
948 if (reg == LPAIF_CDC_VA_WRDMA_INTF_REG(v, i + v->va_wrdma_channel_start, in __lpass_va_regmap_accessible()
968 struct lpass_variant *v = drvdata->variant; in lpass_va_regmap_volatile() local
971 for (i = 0; i < v->va_irq_ports; ++i) { in lpass_va_regmap_volatile()
972 if (reg == LPAIF_VA_IRQCLEAR_REG(v, i)) in lpass_va_regmap_volatile()
974 if (reg == LPAIF_VA_IRQSTAT_REG(v, i)) in lpass_va_regmap_volatile()
978 for (i = 0; i < v->va_wrdma_channels; ++i) { in lpass_va_regmap_volatile()
979 if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start, in lpass_va_regmap_volatile()