Lines Matching refs:fifo

68 static void __dma_enable(struct axg_fifo *fifo,  bool enable)  in __dma_enable()  argument
70 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN, in __dma_enable()
77 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_trigger() local
83 __dma_enable(fifo, true); in axg_fifo_pcm_trigger()
88 __dma_enable(fifo, false); in axg_fifo_pcm_trigger()
101 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_pointer() local
105 regmap_read(fifo->map, FIFO_STATUS2, &addr); in axg_fifo_pcm_pointer()
116 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_hw_params() local
124 regmap_write(fifo->map, FIFO_START_ADDR, runtime->dma_addr); in axg_fifo_pcm_hw_params()
125 regmap_write(fifo->map, FIFO_FINISH_ADDR, end_ptr); in axg_fifo_pcm_hw_params()
129 regmap_write(fifo->map, FIFO_INT_ADDR, burst_num); in axg_fifo_pcm_hw_params()
136 threshold = min(period / 2, fifo->depth / 2); in axg_fifo_pcm_hw_params()
143 regmap_field_write(fifo->field_threshold, in axg_fifo_pcm_hw_params()
148 regmap_update_bits(fifo->map, FIFO_CTRL0, in axg_fifo_pcm_hw_params()
160 struct axg_fifo *fifo = axg_fifo_data(ss); in g12a_fifo_pcm_hw_params() local
169 regmap_write(fifo->map, FIFO_INIT_ADDR, runtime->dma_addr); in g12a_fifo_pcm_hw_params()
178 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_hw_free() local
181 regmap_update_bits(fifo->map, FIFO_CTRL0, in axg_fifo_pcm_hw_free()
188 static void axg_fifo_ack_irq(struct axg_fifo *fifo, u8 mask) in axg_fifo_ack_irq() argument
190 regmap_update_bits(fifo->map, FIFO_CTRL1, in axg_fifo_ack_irq()
195 regmap_update_bits(fifo->map, FIFO_CTRL1, in axg_fifo_ack_irq()
203 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_irq_block() local
206 regmap_read(fifo->map, FIFO_STATUS1, &status); in axg_fifo_pcm_irq_block()
208 axg_fifo_ack_irq(fifo, status); in axg_fifo_pcm_irq_block()
225 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_open() local
248 ret = request_threaded_irq(fifo->irq, NULL, in axg_fifo_pcm_open()
255 ret = clk_prepare_enable(fifo->pclk); in axg_fifo_pcm_open()
260 regmap_update_bits(fifo->map, FIFO_CTRL1, in axg_fifo_pcm_open()
265 __dma_enable(fifo, false); in axg_fifo_pcm_open()
268 regmap_update_bits(fifo->map, FIFO_CTRL0, in axg_fifo_pcm_open()
272 axg_fifo_ack_irq(fifo, FIFO_INT_MASK); in axg_fifo_pcm_open()
275 ret = reset_control_deassert(fifo->arb); in axg_fifo_pcm_open()
282 clk_disable_unprepare(fifo->pclk); in axg_fifo_pcm_open()
284 free_irq(fifo->irq, ss); in axg_fifo_pcm_open()
292 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_close() local
296 ret = reset_control_assert(fifo->arb); in axg_fifo_pcm_close()
299 clk_disable_unprepare(fifo->pclk); in axg_fifo_pcm_close()
302 free_irq(fifo->irq, ss); in axg_fifo_pcm_close()
331 struct axg_fifo *fifo; in axg_fifo_probe() local
341 fifo = devm_kzalloc(dev, sizeof(*fifo), GFP_KERNEL); in axg_fifo_probe()
342 if (!fifo) in axg_fifo_probe()
344 platform_set_drvdata(pdev, fifo); in axg_fifo_probe()
350 fifo->map = devm_regmap_init_mmio(dev, regs, &axg_fifo_regmap_cfg); in axg_fifo_probe()
351 if (IS_ERR(fifo->map)) { in axg_fifo_probe()
353 PTR_ERR(fifo->map)); in axg_fifo_probe()
354 return PTR_ERR(fifo->map); in axg_fifo_probe()
357 fifo->pclk = devm_clk_get(dev, NULL); in axg_fifo_probe()
358 if (IS_ERR(fifo->pclk)) in axg_fifo_probe()
359 return dev_err_probe(dev, PTR_ERR(fifo->pclk), "failed to get pclk\n"); in axg_fifo_probe()
361 fifo->arb = devm_reset_control_get_exclusive(dev, NULL); in axg_fifo_probe()
362 if (IS_ERR(fifo->arb)) in axg_fifo_probe()
363 return dev_err_probe(dev, PTR_ERR(fifo->arb), "failed to get arb reset\n"); in axg_fifo_probe()
365 fifo->irq = of_irq_get(dev->of_node, 0); in axg_fifo_probe()
366 if (fifo->irq <= 0) { in axg_fifo_probe()
367 dev_err(dev, "failed to get irq: %d\n", fifo->irq); in axg_fifo_probe()
368 return fifo->irq; in axg_fifo_probe()
371 fifo->field_threshold = in axg_fifo_probe()
372 devm_regmap_field_alloc(dev, fifo->map, data->field_threshold); in axg_fifo_probe()
373 if (IS_ERR(fifo->field_threshold)) in axg_fifo_probe()
374 return PTR_ERR(fifo->field_threshold); in axg_fifo_probe()
377 &fifo->depth); in axg_fifo_probe()
386 fifo->depth = 256; in axg_fifo_probe()
388 fifo->depth); in axg_fifo_probe()