382 	unsigned int tdm_con = 0;  in mtk_dai_tdm_hw_params()  local
400 	tdm_con |= slave_mode << ETDM_IN1_CON0_REG_SLAVE_MODE_SFT;  in mtk_dai_tdm_hw_params()
401 	tdm_con |= tdm_mode << ETDM_IN1_CON0_REG_FMT_SFT;  in mtk_dai_tdm_hw_params()
402 	tdm_con |= (bit_width - 1) << ETDM_IN1_CON0_REG_BIT_LENGTH_SFT;  in mtk_dai_tdm_hw_params()
403 	tdm_con |= (bit_width - 1) << ETDM_IN1_CON0_REG_WORD_LENGTH_SFT;  in mtk_dai_tdm_hw_params()
404 	tdm_con |= (tdm_channels - 1) << ETDM_IN1_CON0_REG_CH_NUM_SFT;  in mtk_dai_tdm_hw_params()
406 	tdm_con |= 0 << ETDM_IN1_CON0_REG_SYNC_MODE_SFT;  in mtk_dai_tdm_hw_params()
408 	tdm_con |= 0 << ETDM_IN1_CON0_REG_RELATCH_1X_EN_SEL_DOMAIN_SFT;  in mtk_dai_tdm_hw_params()
409 	regmap_update_bits(afe->regmap, ETDM_IN1_CON0, ETDM_IN_CON0_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()
412 	tdm_con = 0;  in mtk_dai_tdm_hw_params()
413 	tdm_con |= 0 << ETDM_IN1_CON1_REG_LRCK_AUTO_MODE_SFT;  in mtk_dai_tdm_hw_params()
414 	tdm_con |= 1 << ETDM_IN1_CON1_PINMUX_MCLK_CTRL_OE_SFT;  in mtk_dai_tdm_hw_params()
415 	tdm_con |= (lrck_width - 1) << ETDM_IN1_CON1_REG_LRCK_WIDTH_SFT;  in mtk_dai_tdm_hw_params()
416 	regmap_update_bits(afe->regmap, ETDM_IN1_CON1, ETDM_IN_CON1_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()
419 	tdm_con = 0;  in mtk_dai_tdm_hw_params()
420 	tdm_con = ETDM_IN_CON3_FS(tran_rate);  in mtk_dai_tdm_hw_params()
421 	regmap_update_bits(afe->regmap, ETDM_IN1_CON3, ETDM_IN_CON3_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()
424 	tdm_con = 0;  in mtk_dai_tdm_hw_params()
425 	tdm_con = ETDM_IN_CON4_FS(tran_relatch_rate);  in mtk_dai_tdm_hw_params()
428 			tdm_con |= ETDM_IN_CON4_CON0_SLAVE_LRCK_INV;  in mtk_dai_tdm_hw_params()
430 			tdm_con |= ETDM_IN_CON4_CON0_SLAVE_BCK_INV;  in mtk_dai_tdm_hw_params()
433 			tdm_con |= ETDM_IN_CON4_CON0_MASTER_LRCK_INV;  in mtk_dai_tdm_hw_params()
435 			tdm_con |= ETDM_IN_CON4_CON0_MASTER_BCK_INV;  in mtk_dai_tdm_hw_params()
437 	regmap_update_bits(afe->regmap, ETDM_IN1_CON4, ETDM_IN_CON4_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()
440 	tdm_con = 0;  in mtk_dai_tdm_hw_params()
442 		tdm_con |= ETDM_IN_CON2_MULTI_IP_2CH_MODE;  in mtk_dai_tdm_hw_params()
443 		tdm_con |= ETDM_IN_CON2_MULTI_IP_CH(channels);  in mtk_dai_tdm_hw_params()
445 	regmap_update_bits(afe->regmap, ETDM_IN1_CON2, ETDM_IN_CON2_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()
448 	tdm_con = 0;  in mtk_dai_tdm_hw_params()
450 		tdm_con |= 1 << ETDM_IN1_CON8_REG_ETDM_USE_AFIFO_SFT;  in mtk_dai_tdm_hw_params()
451 		tdm_con |= 0 << ETDM_IN1_CON8_REG_AFIFO_CLOCK_DOMAIN_SEL_SFT;  in mtk_dai_tdm_hw_params()
452 		tdm_con |= ETDM_IN_CON8_FS(tran_relatch_rate);  in mtk_dai_tdm_hw_params()
454 		tdm_con |= 0 << ETDM_IN1_CON8_REG_ETDM_USE_AFIFO_SFT;  in mtk_dai_tdm_hw_params()
456 	regmap_update_bits(afe->regmap, ETDM_IN1_CON8, ETDM_IN_CON8_CTRL_MASK, tdm_con);  in mtk_dai_tdm_hw_params()