16 static const char *aud_clks[CLK_NUM] = {  variable
83 			__func__, aud_clks[CLK_MUX_AUDIOINTBUS],  in mt8186_set_audio_int_bus_parent()
84 			aud_clks[clk_id], ret);  in mt8186_set_audio_int_bus_parent()
100 				__func__, aud_clks[CLK_TOP_MUX_AUD_1], ret);  in apll1_mux_setting()
107 				__func__, aud_clks[CLK_TOP_MUX_AUD_1],  in apll1_mux_setting()
108 				aud_clks[CLK_TOP_APLL1_CK], ret);  in apll1_mux_setting()
116 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret);  in apll1_mux_setting()
123 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG1],  in apll1_mux_setting()
124 				aud_clks[CLK_TOP_APLL1_D8], ret);  in apll1_mux_setting()
132 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG1],  in apll1_mux_setting()
133 				aud_clks[CLK_CLK26M], ret);  in apll1_mux_setting()
142 				__func__, aud_clks[CLK_TOP_MUX_AUD_1],  in apll1_mux_setting()
143 				aud_clks[CLK_CLK26M], ret);  in apll1_mux_setting()
161 				__func__, aud_clks[CLK_TOP_MUX_AUD_2], ret);  in apll2_mux_setting()
168 				__func__, aud_clks[CLK_TOP_MUX_AUD_2],  in apll2_mux_setting()
169 				aud_clks[CLK_TOP_APLL2_CK], ret);  in apll2_mux_setting()
177 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], ret);  in apll2_mux_setting()
184 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG2],  in apll2_mux_setting()
185 				aud_clks[CLK_TOP_APLL2_D8], ret);  in apll2_mux_setting()
193 				__func__, aud_clks[CLK_TOP_MUX_AUD_ENG2],  in apll2_mux_setting()
194 				aud_clks[CLK_CLK26M], ret);  in apll2_mux_setting()
203 				__func__, aud_clks[CLK_TOP_MUX_AUD_2],  in apll2_mux_setting()
204 				aud_clks[CLK_CLK26M], ret);  in apll2_mux_setting()
223 				__func__, aud_clks[i], ret);  in mt8186_afe_enable_cgs()
248 			__func__, aud_clks[CLK_INFRA_SYS_AUDIO], ret);  in mt8186_afe_enable_clock()
255 			__func__, aud_clks[CLK_INFRA_AUDIO_26M], ret);  in mt8186_afe_enable_clock()
262 			__func__, aud_clks[CLK_MUX_AUDIO], ret);  in mt8186_afe_enable_clock()
269 			__func__, aud_clks[CLK_MUX_AUDIO],  in mt8186_afe_enable_clock()
270 			aud_clks[CLK_CLK26M], ret);  in mt8186_afe_enable_clock()
277 			__func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret);  in mt8186_afe_enable_clock()
289 			__func__, aud_clks[CLK_TOP_MUX_AUDIO_H],  in mt8186_afe_enable_clock()
290 			aud_clks[CLK_TOP_APLL2_CK], ret);  in mt8186_afe_enable_clock()
297 			__func__, aud_clks[CLK_AFE], ret);  in mt8186_afe_enable_clock()
341 			 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret);  in mt8186_afe_suspend_clock()
368 			 __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret);  in mt8186_afe_resume_clock()
398 			__func__, aud_clks[CLK_APLL22M], ret);  in mt8186_apll1_enable()
405 			__func__, aud_clks[CLK_APLL1_TUNER], ret);  in mt8186_apll1_enable()
451 			__func__, aud_clks[CLK_APLL24M], ret);  in mt8186_apll2_enable()
458 			__func__, aud_clks[CLK_APLL2_TUNER], ret);  in mt8186_apll2_enable()
555 				__func__, aud_clks[m_sel_id], ret);  in mt8186_mck_enable()
562 				__func__, aud_clks[m_sel_id],  in mt8186_mck_enable()
563 				aud_clks[apll_clk_id], ret);  in mt8186_mck_enable()
572 			__func__, aud_clks[div_clk_id], ret);  in mt8186_mck_enable()
578 			__func__, aud_clks[div_clk_id], rate, ret);  in mt8186_mck_enable()
610 		afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);  in mt8186_init_clock()
614 				aud_clks[i], PTR_ERR(afe_priv->clk[i]));  in mt8186_init_clock()