Lines Matching +full:comp +full:- +full:disable
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
114 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
115 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
116 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
140 switch (micfil->quality) { in micfil_set_quality()
160 return -EINVAL; in micfil_set_quality()
163 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
174 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
185 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
191 "Disable (Record only)",
201 "Cut-off @1750Hz",
202 "Cut-off @215Hz",
203 "Cut-off @102Hz",
209 * Cut-off @21Hz 0 0
210 * Cut-off @83Hz 0 1
211 * Cut-off @152HZ 1 0
214 "Cut-off @21Hz", "Cut-off @83Hz",
215 "Cut-off @152Hz", "Bypass",
235 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
236 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in micfil_put_dc_remover_state() local
237 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in micfil_put_dc_remover_state()
238 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
244 return -EINVAL; in micfil_put_dc_remover_state()
246 micfil->dc_remover = val; in micfil_put_dc_remover_state()
253 ret = snd_soc_component_update_bits(comp, REG_MICFIL_DC_CTRL, in micfil_put_dc_remover_state()
264 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in micfil_get_dc_remover_state() local
265 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in micfil_get_dc_remover_state()
267 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
275 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_put_enable() local
276 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
277 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
278 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_put_enable()
281 micfil->vad_enabled = val; in hwvad_put_enable()
289 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_get_enable() local
290 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_get_enable()
292 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
300 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_put_init_mode() local
301 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
302 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
303 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_put_init_mode()
306 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
307 * 1 - Energy-based Mode in hwvad_put_init_mode()
309 micfil->vad_init_mode = val; in hwvad_put_init_mode()
317 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_get_init_mode() local
318 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_get_init_mode()
320 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
328 struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); in hwvad_detected() local
329 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); in hwvad_detected()
331 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
382 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
407 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
410 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
416 micfil->verid.version = val & in fsl_micfil_use_verid()
418 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
419 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
421 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
427 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
429 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
430 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
431 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
432 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
433 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
434 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
435 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
436 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
438 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
444 /* The SRES is a self-negated bit which provides the CPU with the
446 * slave-bus interface. This bit always reads as zero, and this
454 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
459 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
465 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
466 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
470 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
479 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
495 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
496 return -EINVAL; in fsl_micfil_startup()
499 micfil->constraint_rates.list = micfil->constraint_rates_list; in fsl_micfil_startup()
500 micfil->constraint_rates.count = 0; in fsl_micfil_startup()
504 clk_rate = clk_get_rate(micfil->clk_src[i]); in fsl_micfil_startup()
506 micfil->constraint_rates_list[k++] = rates[j]; in fsl_micfil_startup()
507 micfil->constraint_rates.count++; in fsl_micfil_startup()
513 if (micfil->constraint_rates.count > 0) in fsl_micfil_startup()
514 snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_micfil_startup()
516 &micfil->constraint_rates); in fsl_micfil_startup()
521 /* Enable/disable hwvad interrupts */
528 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
532 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
538 /* Configuration done only in energy-based initialization mode */
542 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
546 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
550 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
554 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
558 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
562 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
566 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
570 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
576 /* Configuration done only in envelope-based initialization mode */
580 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
584 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
588 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
592 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
596 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
600 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
604 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
608 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
620 * -> Eneveope-based mode (section 8.4.1)
621 * -> Energy-based mode (section 8.4.2)
631 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
633 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
634 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
642 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
646 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
655 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
659 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
667 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
670 /* Disable HWVAD */ in fsl_micfil_hwvad_disable()
671 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
674 /* Disable hwvad interrupts */ in fsl_micfil_hwvad_disable()
677 dev_err(dev, "Failed to disable interrupts\n"); in fsl_micfil_hwvad_disable()
686 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
699 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
700 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
701 * 01 - DMA req enabled in fsl_micfil_trigger()
702 * 10 - IRQ enabled in fsl_micfil_trigger()
703 * 11 - reserved in fsl_micfil_trigger()
705 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
712 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
717 if (micfil->vad_enabled) in fsl_micfil_trigger()
724 if (micfil->vad_enabled) in fsl_micfil_trigger()
727 /* Disable the module */ in fsl_micfil_trigger()
728 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
733 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
740 return -EINVAL; in fsl_micfil_trigger()
747 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
753 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
755 /* Disable clock first, for it was enabled by pm_runtime */ in fsl_micfil_reparent_rootclk()
757 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
758 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
777 /* 1. Disable the module */ in fsl_micfil_hw_params()
778 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
784 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
785 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
793 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
801 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
804 FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
807 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
809 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
812 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
814 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
816 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
817 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
818 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
819 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
820 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
821 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
822 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
829 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
830 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
834 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
835 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
838 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
843 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
849 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
852 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
854 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
855 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
857 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
868 if (micfil->soc->volume_sx) in fsl_micfil_component_probe()
887 .stream_name = "CPU-Capture",
897 .name = "fsl-micfil-dai",
1031 struct platform_device *pdev = micfil->pdev; in micfil_isr()
1038 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
1039 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
1040 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
1044 /* Channel 0-7 Output Data Flags */ in micfil_isr()
1047 dev_dbg(&pdev->dev, in micfil_isr()
1053 regmap_write_bits(micfil->regmap, in micfil_isr()
1061 dev_dbg(&pdev->dev, in micfil_isr()
1066 dev_dbg(&pdev->dev, in micfil_isr()
1077 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1080 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1083 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1086 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1089 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1090 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1102 if (!micfil->card) in voice_detected_fn()
1105 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1109 if (micfil->vad_detected) in voice_detected_fn()
1110 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1112 &kctl->id); in voice_detected_fn()
1120 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1124 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1134 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1138 micfil->vad_detected = 1; in hwvad_isr()
1143 dev_err(dev, "Failed to disable hwvad\n"); in hwvad_isr()
1151 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1154 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1167 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1173 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1175 return -ENOMEM; in fsl_micfil_probe()
1177 micfil->pdev = pdev; in fsl_micfil_probe()
1178 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1180 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1185 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1186 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1187 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1188 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1189 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1192 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1193 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1194 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1195 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1196 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1199 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1200 &micfil->pll11k_clk); in fsl_micfil_probe()
1202 micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; in fsl_micfil_probe()
1203 micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; in fsl_micfil_probe()
1204 micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); in fsl_micfil_probe()
1205 if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) in fsl_micfil_probe()
1206 micfil->clk_src[MICFIL_CLK_EXT3] = NULL; in fsl_micfil_probe()
1213 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1216 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1217 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1218 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1219 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1226 &micfil->dataline); in fsl_micfil_probe()
1228 micfil->dataline = 1; in fsl_micfil_probe()
1230 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1231 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1232 micfil->soc->dataline); in fsl_micfil_probe()
1233 return -EINVAL; in fsl_micfil_probe()
1238 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1239 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1240 return micfil->irq[i]; in fsl_micfil_probe()
1244 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1246 micfil->name, micfil); in fsl_micfil_probe()
1248 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1249 micfil->irq[0]); in fsl_micfil_probe()
1254 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1256 micfil->name, micfil); in fsl_micfil_probe()
1258 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1259 micfil->irq[1]); in fsl_micfil_probe()
1264 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1266 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1268 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1269 micfil->irq[0]); in fsl_micfil_probe()
1274 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1276 micfil->name, micfil); in fsl_micfil_probe()
1278 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1279 micfil->irq[1]); in fsl_micfil_probe()
1283 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1284 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; in fsl_micfil_probe()
1285 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1289 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1290 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1291 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1296 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1301 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1303 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1305 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1306 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1309 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1315 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1317 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1321 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1323 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1326 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1334 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1335 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1337 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1344 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1351 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1353 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1354 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1364 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1368 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1370 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1374 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1375 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1376 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1393 .name = "fsl-micfil-dai",
1400 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");